לחברת הכוורת ניקיון שמירה וכוח אדם דרושה מתאמת פגישות טלפונית לאנשי מכירות
עבודה מול בעלי עסקים .
הקיף המשרה מינימום של 6  שעות ביום
5 ימים בשבוע א- ה אפשרות גם לשישי
בוקר מ 08:30 9 עד 15:00 או 16
חובה ניסיון במכירות פרונטאלי או טלפוני

שכר לפי בסיס + עמלות על תאומי הפגישות. ובונוס נוסף על סגירה עסקה של איש המכירות
קו"ח יש לשלוח למייל :
hr2@hakaveret.co.il

דרישות המשרה

דרישות :
כושר שכנוע,
חריצות,
התמדה ורצון להרוויח!

תיאור
מהות התפקיד :
1. עבודת שטח שכוללת תפעול ניהול ושירות עובדים ולקוחות
2.פיקוח על העובדים ואיכות העבודה. ניהול יומני עבודה, ניהול והובלת צוות עובדים, מתן מענה ללקוחות החברה באתר וביצוע ביקורות שוטפות ודוחות .
3. תפעול גיוסים ברמה אזורית – פרסום משרות, סינון מעומדים , ביצוע ראיונות וליווי מועמדים עד לאיוש המשרה.
4. פיתוח מקורות גיוס ואיתור מועמדים ברשתות חברתיות. ובשטח
5.הובלת תהליכי שימור עובדים ולקוחות .
6. אחריות על עובדי החברה ושמורם .
7. תנאים מצוינים הכוללים שכר מתגמל, רכב צמוד ואופציות קידום לתפקידי ניהול נוספים!
אז אם את /ה מחפש /ת בית חם ותפקיד ניהולי מאתגר עם עתיד וקידום
* קרן השתלמות ופנסיה מהיום הראשון.
*העבודה לטווח ארוך*

המשרה מיועדת לנשים וגברים כאחד
לפרטים
בטלפון 0747671290
קורות חיים וצפיות שכר
מיל : hr2@hakaveret.co.il
פקס : 089150701

דרישות המשרה

דרישות
1.אנגלית בסיסית ( רישום מילים )
2. ניסיון בניהול צוות עובדים חובה , עדיפות לניהול עובדים בתחום הניקיון .
3. ייצוגיות וסמכותיות, תקשורתיות, שירותיות גבוהה ואינטליגנציה רגשית.
4. כושר ניהול והדרכת עובדים, ידע וניסיון בעבודה במערכות ממוחשבות והפעלת יישומי OFFICE.
5. ידע בחוקי העבודה הרלוונטיים לתחום העיסוק – יתרון.
6. מיומנות תקשורת וכושר ניהול משא ומתן, תודעת שירות גבוהה.
7. יחסי אנוש טובים, ידיעת השפה העברית ברמה טובה מאוד, ידיעת שפות נוספות – יתרון.
8. כושר ביטוי טוב בכתב ובעל פה, היתכנות לעבודה בשעות ובימים לא שגרתיים.
9. רישיון נהיגה-חובה.
10. ניסיון במכירות יתרון

לבסיסי צהל ומשרד הביטחון בגלילות דרושים , מפקחים מקומי, עובדי ניקיון ,חצרנות ועובדים כללים
עבודה קבועה תנאים סוציאליים מלאים
שכר גבוה בן 36 ל45 תלוי בתפקיד
למשרה מלאה וחלקית
ארוחות
הסעות או תשלום נסיעות
משמרת בוקר/צהרים /ערב
תנאים מעולים,

לפרטים שילחו הודעה או התקשרו
בטלפון : 074-7671292

מייל לשליחת קורות חיים
hr@hakaveret.co.il

לוואצפ בהודעה בלבד ישיר 0559332109 אין מענה לשיחות הודעות בלבד 

אפשר גם דרך הפיסבוק <-: 
https://www.facebook.com/profile.php?id=100063792193898

דרישות המשרה

התמדה 
רצינות 
עמידה במשימות 

דרוש/ה עובד/ת סוציאלי/ת למילוי מקום למשרות בתחום משפחה, אלימות ואינטייק במסגרת המחלקה לשירותים חברתיים גונן. עבודה בצוות מקצועי ותומך, הדרכה פרטנית, קבוצתית, הכשרות מקצועיות. העסקה דרך עיריית ירושלים, על פי הסכם השכר החדש.

דרישות המשרה

סיום לימודי תואר ראשון בעבודה סוציאלית ורישום בפנקס העובדים הסוציאליים. יכולת עבודה בצוות, וגישה לעבודה עם לקוחות רווחה.

לחברה בתחום החקלאות הימית דרושים/ות בוגרי/ות מדעי החיים – ביולוגיה/ביולוגיה ימית/ביוטכנולוגיה/חקלאות
למשרה התחלתית מעניינת המאפשרת צמיחה ולמידה של התחום. לא נדרש ניסיון, ההכשרה ניתנת במלואה.
במסגרת התפקיד:
תהליכי ייצור מורכבים הכוללים השתלות תאים
בקרת איכות מולקולרית הכוללת הפקת DNA ושליטה ב RT-PCR
טיפול וניהול מחזורי חיים של חיות ימיות במערכות מים סגורות
כתיבת SOP's לייצור ובקרה
הגשת דוחות ביצוע

דרישות המשרה

תואר ראשון רלוונטי – חובה!
יכולת עבודה וטיפול בחיות ימיות – חובה!
ניסיון בחקלאות מים – יתרון
רקע בעבודת מעבדה מולקולרית – יתרון
מגורים באיזור הדרום
זמינות למשרה מלאה של 5 ימים בשבוע עם סבב תורנות בימי שישי

מתויג כ: לאקדמאים ללא ניסיון, תואר ראשון

לבי"ס "שלמון" ראשון לציון דרושה מורה מקצועית לשפה.(עדיפות תינתן לבעלי ניסיון)

לכיתות ד'-ו'.

דרישות המשרה

תעודת הוראה 

עדיפות תינתן לבעלי ניסיון

דרוש/ה רכז/ת לתחום שירותי הדרכה וליווי עבור אוכלוסיות מגוונות – מטעם משרד העבודה והרווחה. 
מיקום המשרה: אור יהודה
משרה מלאה עם מעט גמישות 

התפקיד כולל:
איתור וגיוס של: מלווים, סייעות, חונכים – לתחום הסמך המקצועי ברווחה 
קשר שוטף עם המחלקות לשירותים חברתיים.
קשר עם משפחות המופנות מטעם הרווחה הזקוקות לסיוע של מלווים.
ניהול מערך מעקב ובקרה

דרישות המשרה

תואר אקדמי ראשון – יתרון. עדיפות לבעלי תואר במקצועות הטיפול.
משרה מלאה.
ניסיון קודם בגיוס – יתרון.
אהבת אדם ורצון לעזור.

לחברת סיעוד בפריסה ארצית דרוש/ה: אח/ות, עו"ס, גרונטולוג/ית לביקורי בית במגוון אזורים ברחבי הארץ.
ביקורי בית שוטפים אצל מטופלים.
מתן ידע והדרכה מקצועית למטופלים ובני משפחותיהם.
דיווח שוטף לצוות הסניף על שינויים/ דברים חריגים העולים בעקבות ביקורי הבית.
הגעה אחת לחודש למשרד לדיווחים ועדכונים.
איתור מטופלים פוטנציאלים.
השתתפות בהדרכות מקצועיות בנושא ביקורי בית.

דרישות המשרה

גרונטולוג/ית
עו"ס
אח/ות
רצון ומוכנות למשרת שטח
הכלה וחיוך רחב
ניסיון קודם בביקורי בית – יתרון

דרוש/ה מומחה/ית שיווק ופרסום דיגיטלי
לחצי משרה | עבודה היברידית / מהבית

אם קמפיינים זורמים לך בדם, אם אתה יודע להפוך רעיון ללידים, ואם אתה לא מפחד מספרים — אנחנו רוצים אותך איתנו.

דרישות המשרה

ניהול והקמה של קמפיינים (Google, Meta, TikTok)
בניית אסטרטגיית שיווק דיגיטלית והובלתה בפועל
אופטימיזציה שוטפת ושיפור ביצועים
ניתוח נתונים, דוחות והסקת מסקנות
עבודה מול ספקים/מעצבים/תוכן
דרישות:

ניסיון בניהול קמפיינים ממומנים
חשיבה אנליטית + יצירתיות חדה
שליטה בכלי פרסום ומדידה
עצמאות, אחריות וראש גדול

יתרון: ניסיון בעולם השירותים/משרדי

טיפול ורישום חשבוניות ספקים
ביצוע תשלומי מס"ב
בניית תחשיבי תשלום באקסל
התאמת כרטסות
בקרה ודיווח לרשויות המס

דרישות המשרה

מנהלת חשבונות סוג 2- חובה
ניסיון בתחום הנה"ח ספקים – חובה
אסרטיביות, דייקנות ויכולת התמודדות במצבי לחץ- חובה
שליטה בתוכנת חשבשבת
שליטה בתוכנות office

פקיד/ת ייבוא/ייצוא לחברת שילוח גלובאלית ב.. נתב"ג.
משרה מלאה + 2-3 סופי שבוע!
טיפול במשלוחים ימיים ואוויריים
הכנת מסמכים וחשבוניות, כולל תעודות מקור והיתרי יבוא/יצוא
תמחור והצעת מחירים ללקוחות עבור משלוחים בינלאומיים.
עבודה שוטפת מול סוכני שילוח, עמילי מכס וספקים בינלאומיים.
ניהול תהליך היבוא/יצוא תוך עמידה בדרישות רגולציה ומחויבות לרמות דיוק גבוהות.

דרישות המשרה

הנדסאי/ 12 שנות לימוד + בגרות מלאה!
ניסיון של שנתיים ביבוא/יצוא!
ידע וניסיון בהכנת חשבוניות ותמחור!
עברית רהוטה!
אנגלית ברמה גבוהה – יכולת מענה למיילים, כתיבה, קריאה ודיבור!
שליטה מלאה ביישומי מחשב!
ידע וניסיון בעבודה מול מערכת כגון: פריוריטי, ERP, SAP!
נכונות לעבודה ב.. סופי שבוע [2-3 חודש]!

נהג 12 טון לחברה שילוח גלובלית ב.. נתב"ג
משמרות 06:00-15:00/ 14:00-22:00, 5-6 משמרות בשבוע / כולל שישי ושבת [יום חופשי באמצע שבוע].
איסוף ופיזור משלוחים בכל הארץ
עבודה בשטח התפעולי של החברה במסוף המטענים בנתב"ג
מתן שירות מקצועי ואדיב ללקוחות החברה.
רישיון/ אישור ביטחון שדה יתבצע לפני קליטה לעבודה!
תנאים טובים למתאימים כולל תגמול משמעותי בסופי שבוע!!!

דרישות המשרה

רישיון נהג 12 טון!
ניידות [חובת הגעה עם רכב]!
זמינות לעבודה בסופי שבוע!
עברית שפת אם!
אנגלית ברמה טובה+!
יחסי אנוש מצוינים, תודעת שירות גבוהה, אחריות ויכולת עבודה עצמאית.

פקיד/ת בילינג – בק אופיס לחברת שילוח בינלאומית באור יהודה
משרה מלאה, 5 ימים בשבוע, 08:00-17:00 [קיימת גמישות הגעה/ עבודה ביום ו’].
הזנת מחירונים למערכת התפעולית וה.. בילינג
הזנת נתונים במערכות ממחושבות
בקרת עלויות
עבודה מול סוכנים וחברות תעופה – בדיקת חיובים, זיכויים, מחירונים
התנהלות מול ממשקים פנים ארגוניים בארץ ובסניפי החברה בחו"ל
עבודה מול לקוחות המפתח של הארגון
הוצאת דוחות ללקוחות
תמיכה במחלקת הכספים.

דרישות המשרה

הנדסאי/ת תעשייה וניהול/ הנדסאי/ 12 שנות לימוד + בגרות מלאה – חובה!
ניסיון של שנה וחצי כ.. פקידת בילינג/ בק אופיס בחבר גלובאלית/ גדולה – חובה!
יישומי אופיס בדגש על אקסל ברמה גבוהה – חובה!
אנגלית ברמה גבוהה [ קריאת מיילים/ מענה למיילים ומענה טלפוני באנגלית!] – חובה!
יחסי אנוש מצוינים, אוריינטציה מספרית מוכחת ויכולת ניתוח נתונים, ראיה מרחבית ומערכתית
של תהליכי עבודה, יכולת ריכוז לאורך זמן, סדר וארגון ויכולת עבודה בצוות.

הנהלת חשבונות עד מאזן
טיפול שוטף בלקוחות המשרד
הכנת משכורות ודיווחים לרשויות
עבודה מול מערכות הנהלת חשבונות ושכר
התאמות בנקים, ספקים ולקוחות

דרישות המשרה

תעודת הנהלת חשבונות סוג 2 לפחות (סוג 3 – יתרון)
תעודת חשבות שכר – חובה
ניסיון קודם במשרד רו"ח – יתרון משמעותי
שליטה בסיסית באקסל
סדר, דיוק, אחריות ויכולת עבודה עצמאית

החנות ממוקמת במושב היוגב, המשלוחים מתבצעים ברחבי עמק יזרעאל והסביבה ברכבי החברה.

מוכר כמועדפת!

דרישות המשרה

רשיון רגיל בתוקף

גמישות

יחסי אנוש טובים

אחרי צבא

^^משרה זו נלקחה מ INDEED^^
Join our innovative SoC hardware development team as a UPF Methodology Engineer. In this role, you'll play a key part in defining the flow for next
• generation UPF, enhancing our existing UPF framework, and ensuring its successful implementation and verification across our mobile products. Description Your primary focus will be to advance our UPF methodology, improving power intent definition, implementation, and verification for cutting
• edge mobile products. Key tasks include:
• Driving coverage of power intent through static and dynamic checking methodologies.
• Implementing custom UPF to meet specific project needs.
• Leading UPF implementation and sign
• off processes for FE and P&R.
• Performing checks on power intent for custom circuits.
• Collaborating closely with designers and the design verification team to debug and resolve any UPF flow issues.","responsibilities":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the full RTL
• to
• GDS flow
• Excellent communication skills, as you'll interface with diverse teams. Preferred Qualifications
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl. Minimum Qualifications Bachelor's or Master's degree in Electrical Engineering (EE/EECE/EECS) required.","internalDetails":null,"eeoContent":null

דרישות המשרה

":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the

^^משרה זו נלקחה מ INDEED^^
NVIDIA is looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW PHY development, architecture teams and gain a deep understanding of NVIDIA's Networking products and technologies. If you are an outstanding problem solver who loves a good challenge and looking to expand your horizons, come join us! What you'll be doing: Work on developing the next generation PHY layer for the Ethernet Switch and NIC (network adapter) product lines. Be responsible for designing, developing, and delivering new networking features, debugging real problems of FW PHY flows on customer setups. Innovate! Bring NVIDIA products to the next quality level. What we need to see: B.Sc. in Computer Science / Computer Engineering / Electrical Engineering or equivalent experience 10+ years of experience with C/CPP embedded Knowledge in Linux Phenomenal debug skills Creative, motivated and collaborative person Ways to stand out from the crowd: Motivation to learn and constantly improve processes and tools Experience with Networking applications and protocols Background with Git/Gerrit Experience with python Knowledge of real
• time SW NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward
• thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, perform crucial job functions, and receive other benefits and privileges of employment. Please contact us to request an accommodation.

דרישות המשרה

לא צויין

^^משרה זו נלקחה מ INDEED^^
Join our innovative SoC hardware development team as a UPF Methodology Engineer. In this role, you'll play a key part in defining the flow for next
• generation UPF, enhancing our existing UPF framework, and ensuring its successful implementation and verification across our mobile products. Description Your primary focus will be to advance our UPF methodology, improving power intent definition, implementation, and verification for cutting
• edge mobile products. Key tasks include:
• Driving coverage of power intent through static and dynamic checking methodologies.
• Implementing custom UPF to meet specific project needs.
• Leading UPF implementation and sign
• off processes for FE and P&R.
• Performing checks on power intent for custom circuits.
• Collaborating closely with designers and the design verification team to debug and resolve any UPF flow issues.","responsibilities":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the full RTL
• to
• GDS flow
• Excellent communication skills, as you'll interface with diverse teams. Preferred Qualifications
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl. Minimum Qualifications Bachelor's or Master's degree in Electrical Engineering (EE/EECE/EECS) required.","internalDetails":null,"eeoContent":null

דרישות המשרה

":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the

^^משרה זו נלקחה מ INDEED^^
NVIDIA is looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW PHY development, architecture teams and gain a deep understanding of NVIDIA's Networking products and technologies. If you are an outstanding problem solver who loves a good challenge and looking to expand your horizons, come join us! What you'll be doing: Work on developing the next generation PHY layer for the Ethernet Switch and NIC (network adapter) product lines. Be responsible for designing, developing, and delivering new networking features, debugging real problems of FW PHY flows on customer setups. Innovate! Bring NVIDIA products to the next quality level. What we need to see: B.Sc. in Computer Science / Computer Engineering / Electrical Engineering or equivalent experience 10+ years of experience with C/CPP embedded Knowledge in Linux Phenomenal debug skills Creative, motivated and collaborative person Ways to stand out from the crowd: Motivation to learn and constantly improve processes and tools Experience with Networking applications and protocols Background with Git/Gerrit Experience with python Knowledge of real
• time SW NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward
• thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, perform crucial job functions, and receive other benefits and privileges of employment. Please contact us to request an accommodation.

דרישות המשרה

לא צויין

^^משרה זו נלקחה מ INDEED^^
As a global leader in cybersecurity, CrowdStrike protects the people, processes and technologies that drive modern organizations. Since 2011, our mission hasn’t changed
• we’re here to stop breaches, and we’ve redefined modern security with the world’s most advanced AI
• native platform. We work on large scale distributed systems, processing almost 3 trillion events per day and this traffic is growing daily. Our customers span all industries, and they count on CrowdStrike to keep their businesses running, their communities safe and their lives moving forward. We’re also a mission
• driven company. We cultivate a culture that gives every CrowdStriker both the flexibility and autonomy to own their careers. We’re always looking to add talented CrowdStrikers to the team who have limitless passion, a relentless focus on innovation and a fanatical commitment to our customers, our community and each other. Ready to join a mission that matters? The future of cybersecurity starts with you. About the Role: The Identity Protection product team is seeking an experienced Principal Product Manager who is technical, collaborative, and truly excited about building great identity security products. In this role, you will bring your in
• depth knowledge of identity threat detection and response to protect organizations from identity
• based attacks and help guide the evolution of CrowdStrike's Identity Protection Product Offerings. You will work closely with engineering, researchers, product marketing, sales, support, and other product managers. You will bring existing knowledge about identity security & product management best practices and apply them in delivering significant new features and enhancements, addressing the needs of modern security operations and identity teams. The successful candidate will have the ability to interface and influence cross
• functional teams throughout the company. Key Responsibilities & Deliverables: Act as the product leader for major initiatives around Identity Protection, including different audiences such as Security Operations Teams, Identity & Access Management Administrators, Incident Responders, IT Administrators, and Threat Hunters Monitor and analyze the identity threat landscape including credential theft, account takeover, privilege escalation, lateral movement, and develop strategies to detect and respond to identity
• based attacks Research and maintain deep expertise in Identity Threat Detection and Response (ITDR), Identity and Access Management (IAM), and Privileged Access Management (PAM) markets and capabilities Utilize strategic insight and organizational skills to identify unmet customer needs, define use cases, and advance the functional capabilities of this offering Collaborate closely with Engineering and Data Science to understand identity attack trends, adversary tactics, and deliver new visibility and defenses for identity infrastructure Partner with marketing to help define go
• to
• market strategy & messaging, assist with product positioning, benefits, and target personas Engage with sales and support to champion recent releases and guide future product direction Partner with design to help deliver a world class user experience Conduct competitive analyses and maintain current information regarding competitive activity Work on a team of high
• performing product professionals in a very collaborative environment Desired Skills & Experience: 10+ years of enterprise product management experience, with direct experience in security products Strong understanding of identity protocols (oAuth, OIDC, SAML), APIs, MCP, A2A, and agent ecosystems Strong experience working with Claude Code, Lovable, N8N and other agentic tools in order to create working prototypes, mocks, PRD’s, and gathering customer data. Deep understanding of the ISPM and ITDR markets, players, use cases, and customer value Proven experience scaling products as well as bringing products "0 to 1" Ability to understand IAM and Security team personas and needs Excellent communication skills, both verbal and written, with the ability to properly translate and articulate positioning and technology Demonstrated ability to collaborate with peers in research, engineering, and product marketing Ability to prioritize numerous simultaneous tasks Proven ability to work effectively with both local and remote teams This position requires up to 10% travel to customer and CrowdStrike locations worldwide #LI
• DM2 Benefits of Working at CrowdStrike: Market leader in compensation and equity awards Comprehensive physical and mental wellness programs Competitive vacation and holidays for recharge Paid parental and adoption leaves Professional development opportunities for all employees regardless of level or role Employee Networks, geographic neighborhood groups, and volunteer opportunities to build connections Vibrant office culture with world class amenities Great Place to Work Certified™ across the globe CrowdStrike is proud to be an equal opportunity employer. We are committed to fostering a culture of belonging where everyone is valued for who they are and empowered to succeed. We support veterans and individuals with disabilities through our affirmative action program. CrowdStrike is committed to providing equal employment opportunity for all employees and applicants for employment. The Company does not discriminate in employment opportunities or practices on the basis of race, color, creed, ethnicity, religion, sex (including pregnancy or pregnancy
• related medical conditions), sexual orientation, gender identity, marital or family status, veteran status, age, national origin, ancestry, physical disability (including HIV and AIDS), mental disability, medical condition, genetic information, membership or activity in a local human rights commission, status with regard to public assistance, or any other characteristic protected by law. We base all employment decisions
• including recruitment, selection, training, compensation, benefits, discipline, promotions, transfers, lay
• offs, return from lay
• off, terminations and social/recreational programs
• on valid job requirements. If you need assistance accessing or reviewing the information on this website or need help submitting an application for employment or requesting an accommodation, please contact us at recruiting@crowdstrike.com for further assistance.

דרישות המשרה

& Deliverables: Act as the product leader for major initiatives around Identity Protection, including different audiences such as Security Operations Teams, Identity & Access Management Administrators, Incident Responders, IT Administrators, and Threat Hunters Monitor and analyze the identity threat landscape including credential theft, account takeover, privilege escalation, lateral movement, and

^^משרה זו נלקחה מ INDEED^^
As a global leader in cybersecurity, CrowdStrike protects the people, processes and technologies that drive modern organizations. Since 2011, our mission hasn’t changed
• we’re here to stop breaches, and we’ve redefined modern security with the world’s most advanced AI
• native platform. We work on large scale distributed systems, processing almost 3 trillion events per day and this traffic is growing daily. Our customers span all industries, and they count on CrowdStrike to keep their businesses running, their communities safe and their lives moving forward. We’re also a mission
• driven company. We cultivate a culture that gives every CrowdStriker both the flexibility and autonomy to own their careers. We’re always looking to add talented CrowdStrikers to the team who have limitless passion, a relentless focus on innovation and a fanatical commitment to our customers, our community and each other. Ready to join a mission that matters? The future of cybersecurity starts with you. About the Role: The Identity Protection product team is seeking an experienced Principal Product Manager who is technical, collaborative, and truly excited about building great identity security products. In this role, you will bring your in
• depth knowledge of identity threat detection and response to protect organizations from identity
• based attacks and help guide the evolution of CrowdStrike's Identity Protection Product Offerings. You will work closely with engineering, researchers, product marketing, sales, support, and other product managers. You will bring existing knowledge about identity security & product management best practices and apply them in delivering significant new features and enhancements, addressing the needs of modern security operations and identity teams. The successful candidate will have the ability to interface and influence cross
• functional teams throughout the company. Key Responsibilities & Deliverables: Act as the product leader for major initiatives around Identity Protection, including different audiences such as Security Operations Teams, Identity & Access Management Administrators, Incident Responders, IT Administrators, and Threat Hunters Monitor and analyze the identity threat landscape including credential theft, account takeover, privilege escalation, lateral movement, and develop strategies to detect and respond to identity
• based attacks Research and maintain deep expertise in Identity Threat Detection and Response (ITDR), Identity and Access Management (IAM), and Privileged Access Management (PAM) markets and capabilities Utilize strategic insight and organizational skills to identify unmet customer needs, define use cases, and advance the functional capabilities of this offering Collaborate closely with Engineering and Data Science to understand identity attack trends, adversary tactics, and deliver new visibility and defenses for identity infrastructure Partner with marketing to help define go
• to
• market strategy & messaging, assist with product positioning, benefits, and target personas Engage with sales and support to champion recent releases and guide future product direction Partner with design to help deliver a world class user experience Conduct competitive analyses and maintain current information regarding competitive activity Work on a team of high
• performing product professionals in a very collaborative environment Desired Skills & Experience: 10+ years of enterprise product management experience, with direct experience in security products Strong understanding of identity protocols (oAuth, OIDC, SAML), APIs, MCP, A2A, and agent ecosystems Strong experience working with Claude Code, Lovable, N8N and other agentic tools in order to create working prototypes, mocks, PRD’s, and gathering customer data. Deep understanding of the ISPM and ITDR markets, players, use cases, and customer value Proven experience scaling products as well as bringing products "0 to 1" Ability to understand IAM and Security team personas and needs Excellent communication skills, both verbal and written, with the ability to properly translate and articulate positioning and technology Demonstrated ability to collaborate with peers in research, engineering, and product marketing Ability to prioritize numerous simultaneous tasks Proven ability to work effectively with both local and remote teams This position requires up to 10% travel to customer and CrowdStrike locations worldwide #LI
• DM2 Benefits of Working at CrowdStrike: Market leader in compensation and equity awards Comprehensive physical and mental wellness programs Competitive vacation and holidays for recharge Paid parental and adoption leaves Professional development opportunities for all employees regardless of level or role Employee Networks, geographic neighborhood groups, and volunteer opportunities to build connections Vibrant office culture with world class amenities Great Place to Work Certified™ across the globe CrowdStrike is proud to be an equal opportunity employer. We are committed to fostering a culture of belonging where everyone is valued for who they are and empowered to succeed. We support veterans and individuals with disabilities through our affirmative action program. CrowdStrike is committed to providing equal employment opportunity for all employees and applicants for employment. The Company does not discriminate in employment opportunities or practices on the basis of race, color, creed, ethnicity, religion, sex (including pregnancy or pregnancy
• related medical conditions), sexual orientation, gender identity, marital or family status, veteran status, age, national origin, ancestry, physical disability (including HIV and AIDS), mental disability, medical condition, genetic information, membership or activity in a local human rights commission, status with regard to public assistance, or any other characteristic protected by law. We base all employment decisions
• including recruitment, selection, training, compensation, benefits, discipline, promotions, transfers, lay
• offs, return from lay
• off, terminations and social/recreational programs
• on valid job requirements. If you need assistance accessing or reviewing the information on this website or need help submitting an application for employment or requesting an accommodation, please contact us at recruiting@crowdstrike.com for further assistance.

דרישות המשרה

& Deliverables: Act as the product leader for major initiatives around Identity Protection, including different audiences such as Security Operations Teams, Identity & Access Management Administrators, Incident Responders, IT Administrators, and Threat Hunters Monitor and analyze the identity threat landscape including credential theft, account takeover, privilege escalation, lateral movement, and

^^משרה זו נלקחה מ INDEED^^
Imagine crafting the camera experiences that capture life's most precious moments for millions of Apple users worldwide. From stunning photos to captivating video, your work in camera software and video processing will directly impact how people connect and share their stories. If you're passionate about driving innovation in this exciting field, we have an opportunity for you. The Sensing Software group at Apple develops the high
• end cameras and sensing algorithms and software. We are looking for an Engineering Program Manager who will be responsible for driving research & development of groundbreaking video processing and computer vision AI/ML solutions. In this role, you will drive a highly cross
• functional team of Algo, HW, System, SW, and QE engineers
• from solutions definition, via development and integration, up to shipment as part of a range of Apple products. Description Drive and inspire cross
• functional teams throughout the entire product lifecycle, from initial research to successful product launches. Establish and maintain robust execution plans that align with ambitious schedule and quality objectives Navigate complex technical issues by bringing together the right expertise to drive timely and effective resolutions. Continuously evaluate and refine engineering development processes to optimize performance and maintain high standards. Cultivate a collaborative and transparent environment that promotes effective communication across teams and with leadership. Preferred Qualifications Experience in video processing, computer vision, machine learning fields Experience in generative models (e.g. diffusion models) development as an engineer or a program manager Experience utilizing AI tools for project management tasks; a passion for exploring and implementing innovative AI solutions, prompt engineering, vibe coding and MCPs to improve team efficienc Minimum Qualifications B.Sc. / M.Sc. in Computer Science, Electrical Engineering or similar 5+ years of hands
• on experience as an Algo / SW / System engineer 3+ years of managerial experience (program/project/engineering manager) Excellent communication, presentation, social, and leadership skills Ability to deep dive into technical details, as well as filter and distill relevant information for the right audience Experience in multi
• national development environment","internalDetails":null,"eeoContent":null

דרישות המשרה

Experience in video processing, computer vision, machine learning fields Experience in generative models (e.g. diffusion models) development as an engineer or a program manager Experience utilizing AI tools for project management tasks; a passion for exploring and implementing innovative AI solutions, prompt engineering, vibe coding and MCPs to improve team efficienc Minimum Qualifications B.Sc. /

^^משרה זו נלקחה מ INDEED^^
Imagine crafting the camera experiences that capture life's most precious moments for millions of Apple users worldwide. From stunning photos to captivating video, your work in camera software and video processing will directly impact how people connect and share their stories. If you're passionate about driving innovation in this exciting field, we have an opportunity for you. The Sensing Software group at Apple develops the high
• end cameras and sensing algorithms and software. We are looking for an Engineering Program Manager who will be responsible for driving research & development of groundbreaking video processing and computer vision AI/ML solutions. In this role, you will drive a highly cross
• functional team of Algo, HW, System, SW, and QE engineers
• from solutions definition, via development and integration, up to shipment as part of a range of Apple products. Description Drive and inspire cross
• functional teams throughout the entire product lifecycle, from initial research to successful product launches. Establish and maintain robust execution plans that align with ambitious schedule and quality objectives Navigate complex technical issues by bringing together the right expertise to drive timely and effective resolutions. Continuously evaluate and refine engineering development processes to optimize performance and maintain high standards. Cultivate a collaborative and transparent environment that promotes effective communication across teams and with leadership. Preferred Qualifications Experience in video processing, computer vision, machine learning fields Experience in generative models (e.g. diffusion models) development as an engineer or a program manager Experience utilizing AI tools for project management tasks; a passion for exploring and implementing innovative AI solutions, prompt engineering, vibe coding and MCPs to improve team efficienc Minimum Qualifications B.Sc. / M.Sc. in Computer Science, Electrical Engineering or similar 5+ years of hands
• on experience as an Algo / SW / System engineer 3+ years of managerial experience (program/project/engineering manager) Excellent communication, presentation, social, and leadership skills Ability to deep dive into technical details, as well as filter and distill relevant information for the right audience Experience in multi
• national development environment","internalDetails":null,"eeoContent":null

דרישות המשרה

Experience in video processing, computer vision, machine learning fields Experience in generative models (e.g. diffusion models) development as an engineer or a program manager Experience utilizing AI tools for project management tasks; a passion for exploring and implementing innovative AI solutions, prompt engineering, vibe coding and MCPs to improve team efficienc Minimum Qualifications B.Sc. /

^^משרה זו נלקחה מ INDEED^^
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Overview We are seeking a results driven Pre
• Silicon Verification Engineer with extensive experience in function verification (formal verification and/or simulation/UVM verification) and a passion for leveraging artificial intelligence to redefine the verification landscape. In this role, you will operate at the forefront of semiconductor design and AI innovation, utilizing advanced AI tools to architect, design, and validate the next generation of verification methodologies. You will collaborate closely with a highly skilled team of machine learning engineers experienced in training large language models at scale, as well as accomplished software engineers with proven expertise in product development and deployment. This person will to be part of the ChipStack AI Super Agent team in San Jose, CA
• working on the world’s first agentic AI platform that autonomously designs and verifies chips with up to 10× productivity gains. Cadence has been nominated as a Great Place to Work globally and in Brazil, and is also a Fortune 100 Best Companies to Work For. Key Responsibilities Contribute to the application of machine learning techniques aimed at streamlining traditional pre
• silicon functional verification methodologies like formal verification and UVM. Develop agentic AI solutions using LLMs and latest ML technologies to accelerate pre
• silicon Design Verification process. Employ AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the design and verification lifecycles. Engage directly with customers to understand requirements and deliver innovative, practical verification strategies. Collaborate effectively with machine learning and software engineering teams to validate output correctness, efficiency, and quality. Maintain current knowledge of advancements in AI
• powered hardware verification and actively participate in fostering internal knowledge growth. Required Qualifications BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience Proven expertise of more than 3 years in at least one of the pre
• silicon ASIC verification methodologies such as Formal, SV/UVM and/or OVM. Advanced skills in debugging pre
• silicon verification failures using waveform viewers and simulation analysis tools. Hands
• on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC). Strong programming skills in Verilog, System Verilog and Python Excellent communication skills and the ability to thrive in a team
• oriented environment. Self
• motivated, with a proactive approach to problem solving, continuous learning, and innovation. Exposure to LLMs and ML technologies like RAG, RFT, RL, and Agentic frameworks would be a plus. The Cadence Advantage The opportunity to work on cutting
• edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee
• friendly policies focus on the physical and mental well
• being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence
• One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other
• every day. We’re doing work that matters. Help us solve what others can’t.

דרישות המשרה

Contribute to the application of machine learning techniques aimed at streamlining traditional pre
• silicon functional verification methodologies like formal verification and UVM. Develop agentic AI solutions using LLMs and latest ML technologies to accelerate pre
• silicon Design Verification process. Employ AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the de

^^משרה זו נלקחה מ INDEED^^
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Overview We are seeking a results driven Pre
• Silicon Verification Engineer with extensive experience in function verification (formal verification and/or simulation/UVM verification) and a passion for leveraging artificial intelligence to redefine the verification landscape. In this role, you will operate at the forefront of semiconductor design and AI innovation, utilizing advanced AI tools to architect, design, and validate the next generation of verification methodologies. You will collaborate closely with a highly skilled team of machine learning engineers experienced in training large language models at scale, as well as accomplished software engineers with proven expertise in product development and deployment. This person will to be part of the ChipStack AI Super Agent team in San Jose, CA
• working on the world’s first agentic AI platform that autonomously designs and verifies chips with up to 10× productivity gains. Cadence has been nominated as a Great Place to Work globally and in Brazil, and is also a Fortune 100 Best Companies to Work For. Key Responsibilities Contribute to the application of machine learning techniques aimed at streamlining traditional pre
• silicon functional verification methodologies like formal verification and UVM. Develop agentic AI solutions using LLMs and latest ML technologies to accelerate pre
• silicon Design Verification process. Employ AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the design and verification lifecycles. Engage directly with customers to understand requirements and deliver innovative, practical verification strategies. Collaborate effectively with machine learning and software engineering teams to validate output correctness, efficiency, and quality. Maintain current knowledge of advancements in AI
• powered hardware verification and actively participate in fostering internal knowledge growth. Required Qualifications BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience Proven expertise of more than 3 years in at least one of the pre
• silicon ASIC verification methodologies such as Formal, SV/UVM and/or OVM. Advanced skills in debugging pre
• silicon verification failures using waveform viewers and simulation analysis tools. Hands
• on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC). Strong programming skills in Verilog, System Verilog and Python Excellent communication skills and the ability to thrive in a team
• oriented environment. Self
• motivated, with a proactive approach to problem solving, continuous learning, and innovation. Exposure to LLMs and ML technologies like RAG, RFT, RL, and Agentic frameworks would be a plus. The Cadence Advantage The opportunity to work on cutting
• edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee
• friendly policies focus on the physical and mental well
• being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence
• One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other
• every day. We’re doing work that matters. Help us solve what others can’t.

דרישות המשרה

Contribute to the application of machine learning techniques aimed at streamlining traditional pre
• silicon functional verification methodologies like formal verification and UVM. Develop agentic AI solutions using LLMs and latest ML technologies to accelerate pre
• silicon Design Verification process. Employ AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the de

^^משרה זו נלקחה מ INDEED^^
The CPU Compiler Performance Team welcomes applications from engineers with different levels of experience, passionate about advancing compiler
• based optimization technologies. Our team is responsible for optimizing the code generation for Apple CPUs. We work across many different organizations, such as Hardware Architecture and OS teams, to generate high
• performance code, tuned to Apple’s unique microarchitecture, to provide the best run
• time performance and battery life to our customers. Most of the team’s work happens directly in the LLVM open
• source project and gets presented at the LLVM Developer Meeting. Our team embodies diversity, collaboration, and creativity. Description In this role, you will be part of a highly motivated group of engineers dedicated to pushing compiler optimization technology to the next level. You will analyze diverse real
• world workloads, including state
• of
• the
• art applications and industry
• standard benchmarks, to find opportunities to optimize the code taking advantage of micro
• architectural features. In this HW/SW co
• design role, you will have the opportunity to influence the architecture and micro
• architecture of future Apple silicon. You will also review and provide feedback on the work of your peers and collaborate with them on solutions to the problems they are working on. In this environment, you will continuously refine your expertise, explore new technologies, and engage in projects that bridge hardware and software teams. Your contributions will have a direct impact on every application running on all Apple devices, and your performance analysis will help guide the development of future platforms. If you believe you have additional skills not listed here that would make you a good candidate for this position, please feel free to include a cover letter describing those skills and their applicability to the position. If this is of interest to you, we'd love to hear from you! Preferred Qualifications Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, maps, and graphs Knowledge of common code optimizations and performance analysis Experience in debugging and testing large production code bases Ability to communicate clearly and effectively","internalDetails":null,"eeoContent":null

דרישות המשרה

Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, map

^^משרה זו נלקחה מ INDEED^^
At Apple, we relentlessly strive to create products that enrich people’s lives. Are you passionate about solving unresolved challenges and revolutionizing the industry? We have an exceptional opportunity for an exceptionally talented IP timing lead to join our dynamic group. As a key member of this team, you will have the rare and rewarding privilege of crafting upcoming products that will delight and inspire millions of Apple customers daily. This role is for an IP timing Engineer who will empower us to produce fully functional first silicon IP designs. Your responsibilities will encompass all phases of pre
• silicon development, from defining the constraints to achieving high
• quality tape
• out. Description Join our team in a pivotal role where you'll own the entire IP
• level netlist generation and timing convergence journey from synthesis to sign
• off. You'll drive synthesis, UPF power intent, scan insertion, and external IP integration while architecting timing constraints for both standard and complex custom designs that ensure sign
• off quality from day one. Working at the intersection of multiple disciplines, you'll partner closely with RTL designers to deeply understand design intent and clock architecture, collaborate with CAD teams to shape and optimize cutting
• edge flows, and team with Physical Design engineers to achieve flawless timing sign
• off. We're seeking an innovative thinker who brings fresh perspectives to timing analysis methodologies and proactively identifies and resolves timing challenges to eliminate pessimism and accelerate convergence, ultimately making their mark on next
• generation chip design. Preferred Qualifications Understanding of timing corners/modes Familiarity with process variations and signal integrity
• related issues Hands
• on experience in generating and managing timing/SDC constraints, proficient in scripting languages (Tcl and Perl) Knowledge of synthesis, DFT, and backend
• related methodologies and tools Strong communication skills are required, as you will interact with various groups Minimum Qualifications Bsc/Msc in Electrical Engineering 5+ years of experience in the field At least 2+ years of experience in writing ASIC timing constraints and achieving timing closure Expertise in STA tools (Primetime) and flow generation Knowledge of the ASIC design timing closure flow and methodology","internalDetails":null,"eeoContent":null

דרישות המשרה

will encompass all phases of pre
• silicon development, from defining the constraints to achieving high
• quality tape
• out. Description Join our team in a pivotal role where you'll own the entire IP
• level netlist generation and timing convergence journey from synthesis to sign
• off. You'll drive synthesis, UPF power intent, scan insertion, and external IP integration while architecting timing

^^משרה זו נלקחה מ INDEED^^
The CPU Compiler Performance Team welcomes applications from engineers with different levels of experience, passionate about advancing compiler
• based optimization technologies. Our team is responsible for optimizing the code generation for Apple CPUs. We work across many different organizations, such as Hardware Architecture and OS teams, to generate high
• performance code, tuned to Apple’s unique microarchitecture, to provide the best run
• time performance and battery life to our customers. Most of the team’s work happens directly in the LLVM open
• source project and gets presented at the LLVM Developer Meeting. Our team embodies diversity, collaboration, and creativity. Description In this role, you will be part of a highly motivated group of engineers dedicated to pushing compiler optimization technology to the next level. You will analyze diverse real
• world workloads, including state
• of
• the
• art applications and industry
• standard benchmarks, to find opportunities to optimize the code taking advantage of micro
• architectural features. In this HW/SW co
• design role, you will have the opportunity to influence the architecture and micro
• architecture of future Apple silicon. You will also review and provide feedback on the work of your peers and collaborate with them on solutions to the problems they are working on. In this environment, you will continuously refine your expertise, explore new technologies, and engage in projects that bridge hardware and software teams. Your contributions will have a direct impact on every application running on all Apple devices, and your performance analysis will help guide the development of future platforms. If you believe you have additional skills not listed here that would make you a good candidate for this position, please feel free to include a cover letter describing those skills and their applicability to the position. If this is of interest to you, we'd love to hear from you! Preferred Qualifications Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, maps, and graphs Knowledge of common code optimizations and performance analysis Experience in debugging and testing large production code bases Ability to communicate clearly and effectively","internalDetails":null,"eeoContent":null

דרישות המשרה

Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, map

^^משרה זו נלקחה מ INDEED^^
Company: Qualcomm Israel Ltd. Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Embedded Software Engineer
• 5G RF Firmware We are looking for a talented and driven Embedded Software Engineer with strong C/C++ expertise to join our cutting‑edge 5G software development team . In this role, you will design, implement, test, and maintain RF firmware components that power key 5G features in a high‑performance, real‑time environment. Responsibilities Develop embedded software in C/C++ for hard real‑time systems. Design, implement, and maintain hardware
• software interfaces for seamless interaction with dedicated hardware components. Implement 5G feature functionality at the firmware level. Perform rigorous unit and integration testing to ensure reliability, performance, and robustness. Participate in debugging, optimization, and continuous improvement of firmware modules. Requirements BSc or MSc in Electrical Engineering, Computer Engineering, or a related discipline. 3+ years of hands‑on experience in embedded real‑time software development. Strong proficiency in C/C++ programming. Advantages Experience developing HAL drivers , embedded systems, and low‑level firmware. Knowledge of memory‑constrained systems and optimization of code and data paths. Solid understanding of operating system concepts and system architecture. Familiarity with 5G protocols and wireless communication concepts. Minimum Qualifications:
• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field.
• 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. *References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e
• mail disability
• accomodations@qualcomm.com or call Qualcomm's toll
• free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers .

דרישות המשרה

Develop embedded software in C/C++ for hard real‑time systems. Design, implement, and maintain hardware
• software interfaces for seamless interaction with dedicated hardware components. Implement 5G feature functionality at the firmware level. Perform rigorous unit and integration testing to ensure reliability, performance, and robustness. Participate in debugging, optimization, and continuous im

^^משרה זו נלקחה מ INDEED^^
At Apple, we relentlessly strive to create products that enrich people’s lives. Are you passionate about solving unresolved challenges and revolutionizing the industry? We have an exceptional opportunity for an exceptionally talented IP timing lead to join our dynamic group. As a key member of this team, you will have the rare and rewarding privilege of crafting upcoming products that will delight and inspire millions of Apple customers daily. This role is for an IP timing Engineer who will empower us to produce fully functional first silicon IP designs. Your responsibilities will encompass all phases of pre
• silicon development, from defining the constraints to achieving high
• quality tape
• out. Description Join our team in a pivotal role where you'll own the entire IP
• level netlist generation and timing convergence journey from synthesis to sign
• off. You'll drive synthesis, UPF power intent, scan insertion, and external IP integration while architecting timing constraints for both standard and complex custom designs that ensure sign
• off quality from day one. Working at the intersection of multiple disciplines, you'll partner closely with RTL designers to deeply understand design intent and clock architecture, collaborate with CAD teams to shape and optimize cutting
• edge flows, and team with Physical Design engineers to achieve flawless timing sign
• off. We're seeking an innovative thinker who brings fresh perspectives to timing analysis methodologies and proactively identifies and resolves timing challenges to eliminate pessimism and accelerate convergence, ultimately making their mark on next
• generation chip design. Preferred Qualifications Understanding of timing corners/modes Familiarity with process variations and signal integrity
• related issues Hands
• on experience in generating and managing timing/SDC constraints, proficient in scripting languages (Tcl and Perl) Knowledge of synthesis, DFT, and backend
• related methodologies and tools Strong communication skills are required, as you will interact with various groups Minimum Qualifications Bsc/Msc in Electrical Engineering 5+ years of experience in the field At least 2+ years of experience in writing ASIC timing constraints and achieving timing closure Expertise in STA tools (Primetime) and flow generation Knowledge of the ASIC design timing closure flow and methodology","internalDetails":null,"eeoContent":null

דרישות המשרה

will encompass all phases of pre
• silicon development, from defining the constraints to achieving high
• quality tape
• out. Description Join our team in a pivotal role where you'll own the entire IP
• level netlist generation and timing convergence journey from synthesis to sign
• off. You'll drive synthesis, UPF power intent, scan insertion, and external IP integration while architecting timing

^^משרה זו נלקחה מ INDEED^^
The Wireless Communication group at Apple is a rapidly growing, high energy, results
• oriented team. The team is responsible for the system design integration of a Wireless IC solution. We are looking for a forward
• thinking, motivated and hardworking Engineers to be a part of Apple’s new product introduction process from prototype to mass production. If you are passionate about wireless technologies, want to make an impact and have the desire to work on groundbreaking technologies, then we are looking for you. Description Design and development of signal processing intensive SoCs for wireless communication, as part of the Apple wireless connectivity organization. The Apple eco
• system leverages multiple wireless technologies to enable a user experience like no other. The wireless connectivity team leads the way in developing the ASICs enabling this experience in current and future Apple products. By leveraging state of art processes and tools, unique proprietary features and advanced architecture, the team aims to deliver best in class wireless connectivity solutions.","responsibilities":"Co
• development of PHY layer algorithms, focusing on efficient implementation Derive specifications and micro
• architecture based on matlab/c system model Architecting area and power efficient low latency designs with scalabilities and flexibilities Work with algorithm and software team to ensure performance and power efficiency, from early algorithm definition stage to final DV delivery Derive DV coverage requirements and work closely with verification team to ensure high quality and high level of coverage Running tools to ensure lint
• free and CDC/RDC clean design, including synthesis and timing constraints Support pre
• silicon validation on emulation platforms (e.g. FPGA, Palladium) Support Post
• Silicon and product level validation Support optimisation and fine
• tuning for spec compliance on silicon in an RF lab environment Preferred Qualifications Experience in low power SoC development
• highly preferred Experience in wireless communication protocols: knowledge of either BlueTooth or WLAN IEEE 802.11 protocol
• highly preferred Minimum Qualifications 3+ years of experience in the field of PHY/RTL development Experience in signal processing development (modem, radar, image processing), including algorithms development and RTL implementation Experience and proficiency with using MATLAB/C for algorithm development, modeling, and simulation Good ability to work independently and in small teams Bachelor's/Master's Degree in Electrical Engineering / Computer Engineering","internalDetails":null,"eeoContent":null

דרישות המשרה

":"Co
• development of PHY layer algorithms, focusing on efficient implementation Derive specifications and micro
• architecture based on matlab/c system model Architecting area and power efficient low latency designs with scalabilities and flexibilities Work with algorithm and software team to ensure performance and power efficiency, from early algorithm definition stage to final DV delivery Deri

^^משרה זו נלקחה מ INDEED^^
Company: Qualcomm Israel Ltd. Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Embedded Software Engineer
• 5G RF Firmware We are looking for a talented and driven Embedded Software Engineer with strong C/C++ expertise to join our cutting‑edge 5G software development team . In this role, you will design, implement, test, and maintain RF firmware components that power key 5G features in a high‑performance, real‑time environment. Responsibilities Develop embedded software in C/C++ for hard real‑time systems. Design, implement, and maintain hardware
• software interfaces for seamless interaction with dedicated hardware components. Implement 5G feature functionality at the firmware level. Perform rigorous unit and integration testing to ensure reliability, performance, and robustness. Participate in debugging, optimization, and continuous improvement of firmware modules. Requirements BSc or MSc in Electrical Engineering, Computer Engineering, or a related discipline. 3+ years of hands‑on experience in embedded real‑time software development. Strong proficiency in C/C++ programming. Advantages Experience developing HAL drivers , embedded systems, and low‑level firmware. Knowledge of memory‑constrained systems and optimization of code and data paths. Solid understanding of operating system concepts and system architecture. Familiarity with 5G protocols and wireless communication concepts. Minimum Qualifications:
• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field.
• 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. *References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e
• mail disability
• accomodations@qualcomm.com or call Qualcomm's toll
• free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers .

דרישות המשרה

Develop embedded software in C/C++ for hard real‑time systems. Design, implement, and maintain hardware
• software interfaces for seamless interaction with dedicated hardware components. Implement 5G feature functionality at the firmware level. Perform rigorous unit and integration testing to ensure reliability, performance, and robustness. Participate in debugging, optimization, and continuous im

^^משרה זו נלקחה מ INDEED^^
Minimum qualifications: Bachelor’s degree or equivalent practical experience. 5 years of experience with software development in one or more programming languages. 3 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture. Preferred qualifications: Master's degree or PhD in Computer Science, or a related technical field. 5 years of experience with data structures and algorithms. 1 year of experience in a technical leadership role. Experience developing accessible technologies. About the job Google's software engineers develop the next
• generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large
• scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast
• paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full
• stack as we continue to push technology forward. In this role, you will provide technical leadership for the core investigative engine of the Google security operations platform. You will own all aspects of critical software engineering work, helping to set the technical direction and priorities for the next generation of unified security investigations. You will bridge the gap between Security Information and Event Management (SIEM) and Security Orchestration, Automation, and Response (SOAR) by architecting a unified, AI
• powered platform that empowers security analysts to investigate threats with unprecedented speed and precision. You will self
• direct technical contributions and act as a primary point of contact for cross
• functional partners in UX and product. Google Cloud accelerates every organization’s ability to digitally transform its business and industry. We deliver enterprise
• grade solutions that leverage Google’s technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems. Responsibilities Write and test product or system development code. Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies. Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency). Contribute to existing documentation or educational content and adapt content based on product/program updates and user feedback. Triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, network, or service operations and quality. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

דרישות המשרה

Bachelor’s degree or equivalent practical experience. 5 years of experience with software development in one or more programming languages. 3 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture. Preferred qualifications: Master's degree or PhD in Computer Science, or a related technical field. 5 years of experienc

^^משרה זו נלקחה מ INDEED^^
We are looking for a highly skilled Senior Machine Learning Engineer to lead our transition from on
• demand, third
• party LLM APIs to a fully self
• hosted, scalable model ecosystem. Our core product is an advanced, agentic support chatbot capable of complex reasoning, API tool calling, database lookups, and orchestrating specialized Small Language Models (SLMs) for targeted NLP tasks. As we scale, our current deployment infrastructure (AWS SageMaker) is becoming unsustainable. You will be responsible for architecting, deploying, and optimizing an infrastructure capable of supporting 50 to 100 distinct models ranging from 100M to 70B parameters. What You'll Do: Inference Optimization: Deploy and manage large
• scale models using high
• performance inference engines (like vLLM) to ensure low latency and high throughput for our agentic chatbot. Agentic Workflows: Develop and refine the chatbot's agentic capabilities, ensuring reliable tool
• use, routing, and interactions between massive LLMs and specialized SLMs. Model Fine
• Tuning: Design and execute fine
• tuning strategies to improve model accuracy on specific domain tasks and tool
• calling execution. Rigorous Evaluation: Build comprehensive offline and online evaluation frameworks to constantly measure model performance and business impact through structured A/B testing. What We're Looking For: Core Engineering & AI Frameworks Strong proficiency in Python and Bash scripting. Deep experience with PyTorch and the Hugging Face ecosystem. Experience using AI coding assistants natively in the terminal, specifically Claude Code, to accelerate development workflows. LLMs, Inference & Agents Proven experience deploying models using vLLM, TGI, or similar high
• performance inference servers. Strong fundamental understanding of LLM architectures, attention mechanisms, and generation parameters. Hands
• on experience building Agentic systems (ReAct, function/tool calling, RAG). Expertise in fine
• tuning strategies (e.g., SFT, RLHF, DPO) and parameter
• efficient techniques (PEFT/LoRA). Statistics & Model Evaluation Offline Metrics: Deep understanding of classification/summarization metrics (Precision, Recall, F1, AUC) and retrieval metrics (MRR, NDCG, Precision/Recall @ k). Online Metrics & A/B Testing: Strong statistical foundation to design and analyze A/B tests safely, including the use of t
• tests, Mann
• Whitney U tests, and bootstrapping techniques. Bonus Points Containerization & Orchestration: Experience with Ray for orchestrating large
• scale model deployments across multi
• GPU clusters. Model Quantization: Experience with memory optimization techniques like AWQ, GPTQ, GGUF, or FlashAttention to fit 70B models efficiently onto hardware. API Development: Proficiency in building robust, asynchronous microservices using FastAPI to serve model requests. Knowledge of Data Engineering principles: dataset collection, cleaning, processing, and scalable storage. Experience with core MLOps practices, including dataset versioning (e.g., DVC), experiment tracking (e.g., Weights & Biases, MLflow), and model registries.

דרישות המשרה

לא צויין

^^משרה זו נלקחה מ INDEED^^
The Wireless Communication group at Apple is a rapidly growing, high energy, results
• oriented team. The team is responsible for the system design integration of a Wireless IC solution. We are looking for a forward
• thinking, motivated and hardworking Engineers to be a part of Apple’s new product introduction process from prototype to mass production. If you are passionate about wireless technologies, want to make an impact and have the desire to work on groundbreaking technologies, then we are looking for you. Description Design and development of signal processing intensive SoCs for wireless communication, as part of the Apple wireless connectivity organization. The Apple eco
• system leverages multiple wireless technologies to enable a user experience like no other. The wireless connectivity team leads the way in developing the ASICs enabling this experience in current and future Apple products. By leveraging state of art processes and tools, unique proprietary features and advanced architecture, the team aims to deliver best in class wireless connectivity solutions.","responsibilities":"Co
• development of PHY layer algorithms, focusing on efficient implementation Derive specifications and micro
• architecture based on matlab/c system model Architecting area and power efficient low latency designs with scalabilities and flexibilities Work with algorithm and software team to ensure performance and power efficiency, from early algorithm definition stage to final DV delivery Derive DV coverage requirements and work closely with verification team to ensure high quality and high level of coverage Running tools to ensure lint
• free and CDC/RDC clean design, including synthesis and timing constraints Support pre
• silicon validation on emulation platforms (e.g. FPGA, Palladium) Support Post
• Silicon and product level validation Support optimisation and fine
• tuning for spec compliance on silicon in an RF lab environment Preferred Qualifications Experience in low power SoC development
• highly preferred Experience in wireless communication protocols: knowledge of either BlueTooth or WLAN IEEE 802.11 protocol
• highly preferred Minimum Qualifications 3+ years of experience in the field of PHY/RTL development Experience in signal processing development (modem, radar, image processing), including algorithms development and RTL implementation Experience and proficiency with using MATLAB/C for algorithm development, modeling, and simulation Good ability to work independently and in small teams Bachelor's/Master's Degree in Electrical Engineering / Computer Engineering","internalDetails":null,"eeoContent":null

דרישות המשרה

":"Co
• development of PHY layer algorithms, focusing on efficient implementation Derive specifications and micro
• architecture based on matlab/c system model Architecting area and power efficient low latency designs with scalabilities and flexibilities Work with algorithm and software team to ensure performance and power efficiency, from early algorithm definition stage to final DV delivery Deri

^^משרה זו נלקחה מ INDEED^^
We are looking for a highly skilled Senior Machine Learning Engineer to lead our transition from on
• demand, third
• party LLM APIs to a fully self
• hosted, scalable model ecosystem. Our core product is an advanced, agentic support chatbot capable of complex reasoning, API tool calling, database lookups, and orchestrating specialized Small Language Models (SLMs) for targeted NLP tasks. As we scale, our current deployment infrastructure (AWS SageMaker) is becoming unsustainable. You will be responsible for architecting, deploying, and optimizing an infrastructure capable of supporting 50 to 100 distinct models ranging from 100M to 70B parameters. What You'll Do: Inference Optimization: Deploy and manage large
• scale models using high
• performance inference engines (like vLLM) to ensure low latency and high throughput for our agentic chatbot. Agentic Workflows: Develop and refine the chatbot's agentic capabilities, ensuring reliable tool
• use, routing, and interactions between massive LLMs and specialized SLMs. Model Fine
• Tuning: Design and execute fine
• tuning strategies to improve model accuracy on specific domain tasks and tool
• calling execution. Rigorous Evaluation: Build comprehensive offline and online evaluation frameworks to constantly measure model performance and business impact through structured A/B testing. What We're Looking For: Core Engineering & AI Frameworks Strong proficiency in Python and Bash scripting. Deep experience with PyTorch and the Hugging Face ecosystem. Experience using AI coding assistants natively in the terminal, specifically Claude Code, to accelerate development workflows. LLMs, Inference & Agents Proven experience deploying models using vLLM, TGI, or similar high
• performance inference servers. Strong fundamental understanding of LLM architectures, attention mechanisms, and generation parameters. Hands
• on experience building Agentic systems (ReAct, function/tool calling, RAG). Expertise in fine
• tuning strategies (e.g., SFT, RLHF, DPO) and parameter
• efficient techniques (PEFT/LoRA). Statistics & Model Evaluation Offline Metrics: Deep understanding of classification/summarization metrics (Precision, Recall, F1, AUC) and retrieval metrics (MRR, NDCG, Precision/Recall @ k). Online Metrics & A/B Testing: Strong statistical foundation to design and analyze A/B tests safely, including the use of t
• tests, Mann
• Whitney U tests, and bootstrapping techniques. Bonus Points Containerization & Orchestration: Experience with Ray for orchestrating large
• scale model deployments across multi
• GPU clusters. Model Quantization: Experience with memory optimization techniques like AWQ, GPTQ, GGUF, or FlashAttention to fit 70B models efficiently onto hardware. API Development: Proficiency in building robust, asynchronous microservices using FastAPI to serve model requests. Knowledge of Data Engineering principles: dataset collection, cleaning, processing, and scalable storage. Experience with core MLOps practices, including dataset versioning (e.g., DVC), experiment tracking (e.g., Weights & Biases, MLflow), and model registries.

דרישות המשרה

לא צויין

^^משרה זו נלקחה מ INDEED^^
NVIDIA Networking IC Product Engineering team is looking for a highly skilled IC physical failure analysis (PFA) engineer to join our growing team and support PFA activities for yield improvement, product bring
• up, customer returns, and product qualification. As a PFA engineer, you will own the physical failure analysis (PFA) part, develop work procedures/techniques/recipes, and perform PFA of IC’s using in
• house equipment and in external labs. What You Will Be Doing: Opera te dual
• beam PFIB and develop workflows for the following applications: Site
• specific cross
• sectioning TEM sample preparation IC delayer Large scale cross
• sections Unique sample preparation for different probing and imaging techniques Use SEM based nanoprobing techniques for fault isolation and device/cell characterization based on FA plan provided by the EFA engineers EBAC/EBIC/EBRICH for fault isolation Device and cell level measurements Own and lead nanoprobing activities, including method development and execution. Continuously drive improvements, stay up
• to date, and collaborate with vendors on new techniques. Sample preparation for optical fault isolation, probing and more: use P
• lapping and CNC for Si thinning and IC delayering What We Need to See: BSc in Materials/chemical engineering, physics, chemistry, or related fields 5+ years of relevant industry experience in IC package or die level Failure Analysis. Ability to work and collaborate as part of a team and independently Self
• motivated with the ability to learn alone and review the literature to find solutions to our challenges. Insist on high standards for high
• quality samples Good documentation and communication skills Ways To Stand Out From The Crowd: Good understanding of VLSI circuit design, and/or device physics, and/or IC process engineering Experience with various IC delayering methods Background with dual beam FIB for cross
• sections and preparing lamella for TEM Experience with SEM based nano
• probing

דרישות המשרה

לא צויין

^^משרה זו נלקחה מ INDEED^^
Are you a big
• picture thinker who loves setting ambitious goals?. Do you have a passion for understanding how each line of code affects all the others?. The Core Platform organization of the CoreOS group is committed to building fully integrated operating systems that combine hardware, software, and apps into a single Apple experience. Your dedication to cross
• disciplinary collaboration will help develop groundbreaking technologies, such as iOS, watchOS, and tvOS. By crafting these distinct, holistic user experiences, you’ll continue to uphold and advance the excellence people expect from Apple devices. The Embedded Platform Team within Apple's CoreOS organization is looking for a talented embedded software engineer to help with pre
• silicon simulation, early silicon support and development of the boot
• loader, device drivers and platform software for future generations of iOS devices. Working on a core technology, you have the opportunity to make a major impact in the way that Apple develops and ships iOS products. Our environment fosters product innovation, rapid product iteration, and a liberating amount of autonomy. Weʼre looking for detail
• oriented engineers with exceptional problem
• solving skills and a passion for quality who want to define and build future iOS systems. Description You will play a central role in building the support for iOS/watchOS/macOS/VisionOS system development ranging from the pre
• silicon and early silicon phases, including involvement in specification review for new SoC’s, work with system simulation technologies, boot firmware, low
• level device drivers, and new system bring up. You will work closely with internal and external teams to enable firmware development long before first hardware availability and will continue to work on system software until the product ships. The ideal candidate should be comfortable working on a large spectrum of issues ranging from hardware/silicon issues to overall system operation, performance and power management. Preferred Qualifications Understanding of ARM and RISC
• V assembly is a plus. Minimum Qualifications A genuine passion for embedded development: Vast understanding on how computer system works , boots and executes code. Highly proficient in C/C++. Extensive knowledge of hardware platforms & processor architectures, previous exposure to hardware and processor. simulation, solid experience in hands
• on development and troubleshooting of boot
• loaders, and device drivers. Previous experience with JTAG and other debuggers. We’re looking for someone who is creative, critical thinking and has proven troubleshooting skills. You should be highly professional, with the ability to deliver proven work on tight schedules, have excellent collaborative skills and the ability to work closely with Silicon design and HW design engineers local and abroad. Master’s (preferred) or Bachelor’s degree or equivalent experience in Computer Engineering or Computer Science or a related field.","internalDetails":null,"eeoContent":null

דרישות המשרה

Understanding of ARM and RISC
• V assembly is a plus. Minimum Qualifications A genuine passion for embedded development: Vast understanding on how computer system works , boots and executes code. Highly proficient in C/C++. Extensive knowledge of hardware platforms & processor architectures, previous exposure to hardware and processor. simulation, solid experience in hands
• on development and tro

^^משרה זו נלקחה מ INDEED^^
Are you a big
• picture thinker who loves setting ambitious goals?. Do you have a passion for understanding how each line of code affects all the others?. The Core Platform organization of the CoreOS group is committed to building fully integrated operating systems that combine hardware, software, and apps into a single Apple experience. Your dedication to cross
• disciplinary collaboration will help develop groundbreaking technologies, such as iOS, watchOS, and tvOS. By crafting these distinct, holistic user experiences, you’ll continue to uphold and advance the excellence people expect from Apple devices. The Embedded Platform Team within Apple's CoreOS organization is looking for a talented embedded software engineer to help with pre
• silicon simulation, early silicon support and development of the boot
• loader, device drivers and platform software for future generations of iOS devices. Working on a core technology, you have the opportunity to make a major impact in the way that Apple develops and ships iOS products. Our environment fosters product innovation, rapid product iteration, and a liberating amount of autonomy. Weʼre looking for detail
• oriented engineers with exceptional problem
• solving skills and a passion for quality who want to define and build future iOS systems. Description You will play a central role in building the support for iOS/watchOS/macOS/VisionOS system development ranging from the pre
• silicon and early silicon phases, including involvement in specification review for new SoC’s, work with system simulation technologies, boot firmware, low
• level device drivers, and new system bring up. You will work closely with internal and external teams to enable firmware development long before first hardware availability and will continue to work on system software until the product ships. The ideal candidate should be comfortable working on a large spectrum of issues ranging from hardware/silicon issues to overall system operation, performance and power management. Preferred Qualifications Understanding of ARM and RISC
• V assembly is a plus. Minimum Qualifications A genuine passion for embedded development: Vast understanding on how computer system works , boots and executes code. Highly proficient in C/C++. Extensive knowledge of hardware platforms & processor architectures, previous exposure to hardware and processor. simulation, solid experience in hands
• on development and troubleshooting of boot
• loaders, and device drivers. Previous experience with JTAG and other debuggers. We’re looking for someone who is creative, critical thinking and has proven troubleshooting skills. You should be highly professional, with the ability to deliver proven work on tight schedules, have excellent collaborative skills and the ability to work closely with Silicon design and HW design engineers local and abroad. Master’s (preferred) or Bachelor’s degree or equivalent experience in Computer Engineering or Computer Science or a related field.","internalDetails":null,"eeoContent":null

דרישות המשרה

Understanding of ARM and RISC
• V assembly is a plus. Minimum Qualifications A genuine passion for embedded development: Vast understanding on how computer system works , boots and executes code. Highly proficient in C/C++. Extensive knowledge of hardware platforms & processor architectures, previous exposure to hardware and processor. simulation, solid experience in hands
• on development and tro

^^משרה זו נלקחה מ INDEED^^
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an exceptionally talented IP PD lead. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple customers every single day. This role is for an IP PD Engineer who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of pre
• silicon development from definition to high quality tape
• out. Description As a Physical Design Engineer, you will be in charge of all phases of physical design of high
• performance IP design from RTL to the delivery of our final GDSII. Your responsibilities include, but are not limited to: creating full chip floorplan, including partitioning, power domains, and power grid planning and design. Develop and validate high
• performance low
• power clock network guidelines. Perform block
• level place and route, and close the design to meet timing, area, and power constraints. Generate and implement ECOs to fix timing, noise, and EM IR violations. Run Physical design verification flow at the chip/block level. Participate in establishing CAD and physical design methodologies for correct
• by
• construction designs. Assist in flow development for chip integration. Preferred Qualifications Strong communication skills, as the candidate will interface with a lot of different groups within the company Ability to work well in a team and be productive under a tight schedule Minimum Qualifications BS.c or MS.c in Electrical Engineering 7+ years of Physical Design experience on high
• performance, low
• power SOC Knowledge about industry standards and practices in Physical Design, including Physically aware synthesis, Floorplaning, and Place & Route Experience in developing and implementing Powergrid and Clock specifications Solid Understanding of all aspects of Physical construction, Integration, and Physical Verification Working Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able to work with the logic design team on timing fixes Power user of industry
• standard Physical Design & Synthesis tools Solid Understanding of scripting languages such as Perl/Tcl Working knowledge of Extraction and STA methodology and tools Good understanding of Physical Design Verification methodology to debug LVS/DRC issues at the chip/block level","internalDetails":null,"eeoContent":null

דרישות המשרה

include all phases of pre
• silicon development from definition to high quality tape
• out. Description As a Physical Design Engineer, you will be in charge of all phases of physical design of high
• performance IP design from RTL to the delivery of our final GDSII. Your responsibilities include, but are not limited to: creating full chip floorplan, including partitioning, power domains, and power