-
SOC UPF Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Join our innovative SoC hardware developmen...
לצפיה בפרטי המשרה
צמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Join our innovative SoC hardware development team as a UPF Methodology Engineer. In this role, you'll play a key part in defining the flow for next
• generation UPF, enhancing our existing UPF framework, and ensuring its successful implementation and verification across our mobile products. Description Your primary focus will be to advance our UPF methodology, improving power intent definition, implementation, and verification for cutting
• edge mobile products. Key tasks include:
• Driving coverage of power intent through static and dynamic checking methodologies.
• Implementing custom UPF to meet specific project needs.
• Leading UPF implementation and sign
• off processes for FE and P&R.
• Performing checks on power intent for custom circuits.
• Collaborating closely with designers and the design verification team to debug and resolve any UPF flow issues.","responsibilities":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the full RTL
• to
• GDS flow
• Excellent communication skills, as you'll interface with diverse teams. Preferred Qualifications
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl. Minimum Qualifications Bachelor's or Master's degree in Electrical Engineering (EE/EECE/EECS) required.","internalDetails":null,"eeoContent":nullדרישות המשרה
":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the
משרה מס' 390338
-
Senior Firmware Design Engineer
פורסם לפני 4 ימיםשם החברה: NVIDIAמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ NVIDIA is looking for an excellent Firmware...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
NVIDIA is looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW PHY development, architecture teams and gain a deep understanding of NVIDIA's Networking products and technologies. If you are an outstanding problem solver who loves a good challenge and looking to expand your horizons, come join us! What you'll be doing: Work on developing the next generation PHY layer for the Ethernet Switch and NIC (network adapter) product lines. Be responsible for designing, developing, and delivering new networking features, debugging real problems of FW PHY flows on customer setups. Innovate! Bring NVIDIA products to the next quality level. What we need to see: B.Sc. in Computer Science / Computer Engineering / Electrical Engineering or equivalent experience 10+ years of experience with C/CPP embedded Knowledge in Linux Phenomenal debug skills Creative, motivated and collaborative person Ways to stand out from the crowd: Motivation to learn and constantly improve processes and tools Experience with Networking applications and protocols Background with Git/Gerrit Experience with python Knowledge of real
• time SW NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward
• thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, perform crucial job functions, and receive other benefits and privileges of employment. Please contact us to request an accommodation.דרישות המשרה
לא צויין
משרה מס' 390336
-
SOC UPF Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Join our innovative SoC hardware developmen...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Join our innovative SoC hardware development team as a UPF Methodology Engineer. In this role, you'll play a key part in defining the flow for next
• generation UPF, enhancing our existing UPF framework, and ensuring its successful implementation and verification across our mobile products. Description Your primary focus will be to advance our UPF methodology, improving power intent definition, implementation, and verification for cutting
• edge mobile products. Key tasks include:
• Driving coverage of power intent through static and dynamic checking methodologies.
• Implementing custom UPF to meet specific project needs.
• Leading UPF implementation and sign
• off processes for FE and P&R.
• Performing checks on power intent for custom circuits.
• Collaborating closely with designers and the design verification team to debug and resolve any UPF flow issues.","responsibilities":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the full RTL
• to
• GDS flow
• Excellent communication skills, as you'll interface with diverse teams. Preferred Qualifications
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl. Minimum Qualifications Bachelor's or Master's degree in Electrical Engineering (EE/EECE/EECS) required.","internalDetails":null,"eeoContent":nullדרישות המשרה
":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the
משרה מס' 390337
-
Senior Firmware Design Engineer
פורסם לפני 4 ימיםשם החברה: NVIDIAמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ NVIDIA is looking for an excellent Firmware...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
NVIDIA is looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW PHY development, architecture teams and gain a deep understanding of NVIDIA's Networking products and technologies. If you are an outstanding problem solver who loves a good challenge and looking to expand your horizons, come join us! What you'll be doing: Work on developing the next generation PHY layer for the Ethernet Switch and NIC (network adapter) product lines. Be responsible for designing, developing, and delivering new networking features, debugging real problems of FW PHY flows on customer setups. Innovate! Bring NVIDIA products to the next quality level. What we need to see: B.Sc. in Computer Science / Computer Engineering / Electrical Engineering or equivalent experience 10+ years of experience with C/CPP embedded Knowledge in Linux Phenomenal debug skills Creative, motivated and collaborative person Ways to stand out from the crowd: Motivation to learn and constantly improve processes and tools Experience with Networking applications and protocols Background with Git/Gerrit Experience with python Knowledge of real
• time SW NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward
• thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, perform crucial job functions, and receive other benefits and privileges of employment. Please contact us to request an accommodation.דרישות המשרה
לא צויין
משרה מס' 390335
-
Compiler Performance Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ The CPU Compiler Performance Team welcomes ...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
The CPU Compiler Performance Team welcomes applications from engineers with different levels of experience, passionate about advancing compiler
• based optimization technologies. Our team is responsible for optimizing the code generation for Apple CPUs. We work across many different organizations, such as Hardware Architecture and OS teams, to generate high
• performance code, tuned to Apple’s unique microarchitecture, to provide the best run
• time performance and battery life to our customers. Most of the team’s work happens directly in the LLVM open
• source project and gets presented at the LLVM Developer Meeting. Our team embodies diversity, collaboration, and creativity. Description In this role, you will be part of a highly motivated group of engineers dedicated to pushing compiler optimization technology to the next level. You will analyze diverse real
• world workloads, including state
• of
• the
• art applications and industry
• standard benchmarks, to find opportunities to optimize the code taking advantage of micro
• architectural features. In this HW/SW co
• design role, you will have the opportunity to influence the architecture and micro
• architecture of future Apple silicon. You will also review and provide feedback on the work of your peers and collaborate with them on solutions to the problems they are working on. In this environment, you will continuously refine your expertise, explore new technologies, and engage in projects that bridge hardware and software teams. Your contributions will have a direct impact on every application running on all Apple devices, and your performance analysis will help guide the development of future platforms. If you believe you have additional skills not listed here that would make you a good candidate for this position, please feel free to include a cover letter describing those skills and their applicability to the position. If this is of interest to you, we'd love to hear from you! Preferred Qualifications Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, maps, and graphs Knowledge of common code optimizations and performance analysis Experience in debugging and testing large production code bases Ability to communicate clearly and effectively","internalDetails":null,"eeoContent":nullדרישות המשרה
Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, map
משרה מס' 390328
-
Compiler Performance Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ The CPU Compiler Performance Team welcomes ...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
The CPU Compiler Performance Team welcomes applications from engineers with different levels of experience, passionate about advancing compiler
• based optimization technologies. Our team is responsible for optimizing the code generation for Apple CPUs. We work across many different organizations, such as Hardware Architecture and OS teams, to generate high
• performance code, tuned to Apple’s unique microarchitecture, to provide the best run
• time performance and battery life to our customers. Most of the team’s work happens directly in the LLVM open
• source project and gets presented at the LLVM Developer Meeting. Our team embodies diversity, collaboration, and creativity. Description In this role, you will be part of a highly motivated group of engineers dedicated to pushing compiler optimization technology to the next level. You will analyze diverse real
• world workloads, including state
• of
• the
• art applications and industry
• standard benchmarks, to find opportunities to optimize the code taking advantage of micro
• architectural features. In this HW/SW co
• design role, you will have the opportunity to influence the architecture and micro
• architecture of future Apple silicon. You will also review and provide feedback on the work of your peers and collaborate with them on solutions to the problems they are working on. In this environment, you will continuously refine your expertise, explore new technologies, and engage in projects that bridge hardware and software teams. Your contributions will have a direct impact on every application running on all Apple devices, and your performance analysis will help guide the development of future platforms. If you believe you have additional skills not listed here that would make you a good candidate for this position, please feel free to include a cover letter describing those skills and their applicability to the position. If this is of interest to you, we'd love to hear from you! Preferred Qualifications Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, maps, and graphs Knowledge of common code optimizations and performance analysis Experience in debugging and testing large production code bases Ability to communicate clearly and effectively","internalDetails":null,"eeoContent":nullדרישות המשרה
Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, map
משרה מס' 390327
-
SOC UPF Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Join our innovative SoC hardware developmen...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Join our innovative SoC hardware development team as a UPF Methodology Engineer. In this role, you'll play a key part in defining the flow for next
• generation UPF, enhancing our existing UPF framework, and ensuring its successful implementation and verification across our mobile products. Description Your primary focus will be to advance our UPF methodology, improving power intent definition, implementation, and verification for cutting
• edge mobile products. Key tasks include:
• Driving coverage of power intent through static and dynamic checking methodologies.
• Implementing custom UPF to meet specific project needs.
• Leading UPF implementation and sign
• off processes for FE and P&R.
• Performing checks on power intent for custom circuits.
• Collaborating closely with designers and the design verification team to debug and resolve any UPF flow issues.","responsibilities":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the full RTL
• to
• GDS flow
• Excellent communication skills, as you'll interface with diverse teams. Preferred Qualifications
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl. Minimum Qualifications Bachelor's or Master's degree in Electrical Engineering (EE/EECE/EECS) required.","internalDetails":null,"eeoContent":nullדרישות המשרה
":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the
משרה מס' 390312
-
Senior Firmware Design Engineer
פורסם לפני 4 ימיםשם החברה: NVIDIAמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ NVIDIA is looking for an excellent Firmware...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
NVIDIA is looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW PHY development, architecture teams and gain a deep understanding of NVIDIA's Networking products and technologies. If you are an outstanding problem solver who loves a good challenge and looking to expand your horizons, come join us! What you'll be doing: Work on developing the next generation PHY layer for the Ethernet Switch and NIC (network adapter) product lines. Be responsible for designing, developing, and delivering new networking features, debugging real problems of FW PHY flows on customer setups. Innovate! Bring NVIDIA products to the next quality level. What we need to see: B.Sc. in Computer Science / Computer Engineering / Electrical Engineering or equivalent experience 10+ years of experience with C/CPP embedded Knowledge in Linux Phenomenal debug skills Creative, motivated and collaborative person Ways to stand out from the crowd: Motivation to learn and constantly improve processes and tools Experience with Networking applications and protocols Background with Git/Gerrit Experience with python Knowledge of real
• time SW NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward
• thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, perform crucial job functions, and receive other benefits and privileges of employment. Please contact us to request an accommodation.דרישות המשרה
לא צויין
משרה מס' 390307
-
DevOps Engineer
פורסם לפני 4 ימיםשם החברה: Varonis Systemsמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Summary Data has never been more valuable a...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Summary Data has never been more valuable and vulnerable. As cybercriminals become more sophisticated and regulations more strict, organizations struggle to answer one key question: “Is my data safe?" At Varonis, we see the world of cybersecurity differently. Instead of chasing threats, we believe the most practical approach is protecting data from the inside out. We’ve built the industry’s first fully autonomous Data Security Platform to help our customers dramatically reduce risk with minimal human effort. At Varonis, we move fast. We’re an ultra
• collaborative company with brilliant people who care deeply about the details. Together, we’re solving interesting and complex puzzles to keep the world’s data safe. We work in a flexible, hybrid model, so you can choose the home
• office balance that works best for you. We are looking for a skilled and motivated DevOps engineer to join our DevOps team. As part of our team, you will be a part of a unique and efficient group leading Varonis’ DatAdvantage Cloud, as it scales to host and serve thousands of new customers on a pure SaaS infrastructure. You will join an innovative, high
• performance team and work with cutting edge technologies in a dynamic and agile environment. In this role, you will design, build and manage our cloud
• native infrastructure, and play a key role in architecture planning. You will be part of a cross
• continent DevOps Group, which is leading Varonis’s DAC (‘Data Advantage Cloud’), through its way to protect the data of thousands of customers on a pure SaaS infrastructure. You will join a high
• performance team and work with cutting
• edge technologies in a dynamic and agile environment. In this role, you will design, build, and manage our cloud
• native infrastructure, CI/CD, along with architecture planning and innovation. Responsibilities Take an integral part in shaping the future of our enterprise
• scale environment architecture. Provide support and solutions to our growing R&D Groups. Design, build and operate cloud infrastructure to enable reliable, rapid, effective and flexible CI/CD process across all microservices. Develop, and transition the current processes into platform engineering methodologies based on a guardrail and self
• service principles. Develop and maintain observability for all cloud engineering aspects. Establish standards, practices and innovative solutions that will be used across all microservices and help the entire R&D move fast. Work closely with Engineering teams, taking full responsibility and ownership from conception to post
• deployment in a collaborative, fast
• paced environment. Desired Skills & Experience At least 5
• 7 years of experience as a DevOps/SRE/Cloud engineer with passion for technology and a “can do” approach. Extensive experience managing and optimizing Kubernetes ecosystem. Extensive experience working with cloud platforms (AWS preferred); Hands
• on experience in architecting and building infrastructure using cloud
• native technologies to deliver highly available and resilient software systems
• Must High proficiency in code
• Python preferred. Experience in working with Infrastructure as Code (IaC) tools (Terraform preferred). Experience in designing, building, and maintaining CI/CD processes (Such as GitHub Actions, Jenkins). Experience with logging and monitoring solutions (such as Prometheus, Grafana, Datadog). Be proactive with a self
• starter attitude and strong opinions on what is right, as well as a good team player
• you will be part of a super talented and experienced team. Advantage: Experience implementing and automating security controls and compliance validation demanded by the CISO. Advantage: Experience with streaming and queue solutions (Kafka preferred). Advantage: Experience managing SQL and NoSQL DBs (such as MySQL, Elastic, Neo4j, Redis). We invite you to check out our Instagram Page to gain further insight into the Varonis culture! @VaronisLife Varonis is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, national origin, disability, veteran status, and other legally protected characteristics. #LI
• Hybrid #LI
• IOדרישות המשרה
Take an integral part in shaping the future of our enterprise
• scale environment architecture. Provide support and solutions to our growing R&D Groups. Design, build and operate cloud infrastructure to enable reliable, rapid, effective and flexible CI/CD process across all microservices. Develop, and transition the current processes into platform engineering methodologies based on a guardrail and
משרה מס' 390302
-
Storage Software Simulation Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ In your role as a SW Engineer at Apple’s St...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
In your role as a SW Engineer at Apple’s Storage Algorithms Group, you will assume full responsibility for the development of storage
• related tools and internal applications that benefit multiple teams within the group. You will be in charge of the full development cycle, including mapping customer needs, SW architecture design, coding, deployment and ongoing support.. Description A unique opportunity to lead a multi
• faceted SW development operation that impacts a productization path of massive scale.","responsibilities":"Develop tailored tools and internal applications based on customer needs Provide unique solutions based on a deep understanding of the SSD physical layer Initiate innovative processes and methodologies to increase the group’s efficiency Architect and implement behavioral simulators modeling SSD components and physical
• layer behavior Preferred Qualifications Passion for application development, positive customer
• facing approach and ability to drive processes independently. Minimum Qualifications Bachelor's degree in CE, CS or EE (M.Sc
• an advantage) At least 5 years of proven experience in developing applications High coding proficiency in Python, C++ and Matlab Multi
• disciplinary skillset, including scripting, OOP, DB, GUI Proven track record of owning the full SW development cycle from requirements to deployment Good analytic capabilities and ability to grasp detailed engineering concepts","internalDetails":null,"eeoContent":nullדרישות המשרה
":"Develop tailored tools and internal applications based on customer needs Provide unique solutions based on a deep understanding of the SSD physical layer Initiate innovative processes and methodologies to increase the group’s efficiency Architect and implement behavioral simulators modeling SSD components and physical
• layer behavior Preferred Qualifications Passion for application development
משרה מס' 390303
-
Embedded Firmware Engineer – NAND Storage Controller
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Our team is looking for an FW engineer to d...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Our team is looking for an FW engineer to design, develop, and implement complex SW modules. The integration will require cooperation with other teams and vendors abroad. You’ll be part of a team developing complex and versatile hardware/software integrated solutions for mission
• critical tasks in future Apple products. Are you a big
• picture thinker who loves setting ambitious goals? Do you have a passion for understanding how each line of code affects all the others? Your dedication to cross
• disciplinary collaboration will help develop groundbreaking technologies like iOS, macOS, watchOS, and tvOS. By crafting these distinct, holistic user experiences, you’ll continue to uphold and advance the excellence people expect from Apple devices. Description Be part of a team working on high
• speed IO characterization. Take part in SW design sessions (detailed designs involving system understanding), provide HLD and LLD documentation of central SW modules, participate in the coding of complex SW modules, debug complicated (system
• wide) bugs, and lead HW
• SW integrations. Preferred Qualifications Knowledge and experience with High Speed IO interfaces. Experience in low
• level embedded software/firmware development and firmware architecture. Strong hands
• on software programming skills with a focus on embedded systems; proficiency in C programming is essential. Skilled in scripting, with a preference for Python, to automate testing and data analysis. Exceptional problem
• solving and debugging skills. Independent, highly motivated, with good interpersonal skills. Minimum Qualifications BS in Computer Science / Electrical Engineering / Computer Engineering or equivalent experience","internalDetails":null,"eeoContent":nullדרישות המשרה
Knowledge and experience with High Speed IO interfaces. Experience in low
• level embedded software/firmware development and firmware architecture. Strong hands
• on software programming skills with a focus on embedded systems; proficiency in C programming is essential. Skilled in scripting, with a preference for Python, to automate testing and data analysis. Exceptional problem
• solving and debu
משרה מס' 390299
-
Compiler Performance Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ The CPU Compiler Performance Team welcomes ...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
The CPU Compiler Performance Team welcomes applications from engineers with different levels of experience, passionate about advancing compiler
• based optimization technologies. Our team is responsible for optimizing the code generation for Apple CPUs. We work across many different organizations, such as Hardware Architecture and OS teams, to generate high
• performance code, tuned to Apple’s unique microarchitecture, to provide the best run
• time performance and battery life to our customers. Most of the team’s work happens directly in the LLVM open
• source project and gets presented at the LLVM Developer Meeting. Our team embodies diversity, collaboration, and creativity. Description In this role, you will be part of a highly motivated group of engineers dedicated to pushing compiler optimization technology to the next level. You will analyze diverse real
• world workloads, including state
• of
• the
• art applications and industry
• standard benchmarks, to find opportunities to optimize the code taking advantage of micro
• architectural features. In this HW/SW co
• design role, you will have the opportunity to influence the architecture and micro
• architecture of future Apple silicon. You will also review and provide feedback on the work of your peers and collaborate with them on solutions to the problems they are working on. In this environment, you will continuously refine your expertise, explore new technologies, and engage in projects that bridge hardware and software teams. Your contributions will have a direct impact on every application running on all Apple devices, and your performance analysis will help guide the development of future platforms. If you believe you have additional skills not listed here that would make you a good candidate for this position, please feel free to include a cover letter describing those skills and their applicability to the position. If this is of interest to you, we'd love to hear from you! Preferred Qualifications Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, maps, and graphs Knowledge of common code optimizations and performance analysis Experience in debugging and testing large production code bases Ability to communicate clearly and effectively","internalDetails":null,"eeoContent":nullדרישות המשרה
Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, map
משרה מס' 390297
-
Senior Firmware Design Engineer
פורסם לפני 4 ימיםשם החברה: NVIDIAמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ NVIDIA is looking for an excellent Firmware...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
NVIDIA is looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW PHY development, architecture teams and gain a deep understanding of NVIDIA's Networking products and technologies. If you are an outstanding problem solver who loves a good challenge and looking to expand your horizons, come join us! What you'll be doing: Work on developing the next generation PHY layer for the Ethernet Switch and NIC (network adapter) product lines. Be responsible for designing, developing, and delivering new networking features, debugging real problems of FW PHY flows on customer setups. Innovate! Bring NVIDIA products to the next quality level. What we need to see: B.Sc. in Computer Science / Computer Engineering / Electrical Engineering or equivalent experience 10+ years of experience with C/CPP embedded Knowledge in Linux Phenomenal debug skills Creative, motivated and collaborative person Ways to stand out from the crowd: Motivation to learn and constantly improve processes and tools Experience with Networking applications and protocols Background with Git/Gerrit Experience with python Knowledge of real
• time SW NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward
• thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry! We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, perform crucial job functions, and receive other benefits and privileges of employment. Please contact us to request an accommodation.דרישות המשרה
לא צויין
משרה מס' 390295
-
SOC UPF Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Join our innovative SoC hardware developmen...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Join our innovative SoC hardware development team as a UPF Methodology Engineer. In this role, you'll play a key part in defining the flow for next
• generation UPF, enhancing our existing UPF framework, and ensuring its successful implementation and verification across our mobile products. Description Your primary focus will be to advance our UPF methodology, improving power intent definition, implementation, and verification for cutting
• edge mobile products. Key tasks include:
• Driving coverage of power intent through static and dynamic checking methodologies.
• Implementing custom UPF to meet specific project needs.
• Leading UPF implementation and sign
• off processes for FE and P&R.
• Performing checks on power intent for custom circuits.
• Collaborating closely with designers and the design verification team to debug and resolve any UPF flow issues.","responsibilities":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the full RTL
• to
• GDS flow
• Excellent communication skills, as you'll interface with diverse teams. Preferred Qualifications
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl. Minimum Qualifications Bachelor's or Master's degree in Electrical Engineering (EE/EECE/EECS) required.","internalDetails":null,"eeoContent":nullדרישות המשרה
":"We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
• Proficiency in UPF implementation and verification.
• Strong skills in scripting languages such as Python and Tcl.
• Familiarity with CMOS design power.
• Familiarity with multi
• voltage static checkers (e.g., VSILP/VCLP, CLP).
• Knowledge of the
משרה מס' 390291
-
PHY Firmware Design & Development Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ At Apple, new ideas have a way of becoming ...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
At Apple, new ideas have a way of becoming products, services and customer experiences very quickly. Every single day, people do amazing things at Apple. Imagine what you could do here! Do you want to impact billions of users by developing an extraordinary product with a prime focus on accuracy, understandability and performance of the product? Will you help us design future generations of revolutionary Apple products? The PHY Firmware team is seeking a firmware engineer with demonstrable passion for building new technologies. The team designs and develops the Physical Layer Firmware for Wireless Communication Systems. You will become part of a hands
• on development team that fosters engineering perfection, creativity and innovation. Dynamic, encouraging people and innovative technologies are the norm here. If you are a resourceful engineer with the desire to research and develop solutions that do not yet exist, we want you to join our team. Description Develop communication firmware for best
• in
• class implementation of various wireless standards basic research of existing solutions in literature. Involvement in design of firmware architecture, from top
• level down to block
• level. Define and write high
• level design documents that will enable firmware coding for micro
• controller and fine
• tune the firmware for spec compliance on silicon in an RF lab environment. The people who work here have reinvented and defined entire industries with our products and services. The same passion for innovation also applies to our practices
• strengthening our commitment to leave the world better than we found it. You should join us if you want to help deliver the next amazing Apple product. Preferred Qualifications Knowledge in wireless protocols: BlueTooth or WLAN (IEEE 802.11)
• highly preferred Knowledge in digital signal processing algorithms
• highly preferred Knowledge in RF systems
• highly preferred Experience with AI agentic flow
• highly preferred Experience in RF lab work and testing equipment (Spectrum, Analyser, Signal Generator, etc.)
• preferred Experience and proficiency in ARM CPU processors architecture
• preferred Experience with programming in assembly language on industry standard CPUs and DSP processors
• preferred Experience and proficiency in Python language
• preferred Minimum Qualifications 5+ years of experience in low
• level real
• time/embedded programming and firmware architecture
• mandatory Experience and proficiency in C programming language
• mandatory B.Sc / M.Sc. degree in Electrical Engineering, Computer Engineering, or related discipline","internalDetails":null,"eeoContent":nullדרישות המשרה
Knowledge in wireless protocols: BlueTooth or WLAN (IEEE 802.11)
• highly preferred Knowledge in digital signal processing algorithms
• highly preferred Knowledge in RF systems
• highly preferred Experience with AI agentic flow
• highly preferred Experience in RF lab work and testing equipment (Spectrum, Analyser, Signal Generator, etc.)
• preferred Experience and proficiency in ARM CPU processors
משרה מס' 390286
-
DevOps Engineer
פורסם לפני 4 ימיםשם החברה: Varonis Systemsמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Summary Data has never been more valuable a...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Summary Data has never been more valuable and vulnerable. As cybercriminals become more sophisticated and regulations more strict, organizations struggle to answer one key question: “Is my data safe?" At Varonis, we see the world of cybersecurity differently. Instead of chasing threats, we believe the most practical approach is protecting data from the inside out. We’ve built the industry’s first fully autonomous Data Security Platform to help our customers dramatically reduce risk with minimal human effort. At Varonis, we move fast. We’re an ultra
• collaborative company with brilliant people who care deeply about the details. Together, we’re solving interesting and complex puzzles to keep the world’s data safe. We work in a flexible, hybrid model, so you can choose the home
• office balance that works best for you. We are looking for a skilled and motivated DevOps engineer to join our DevOps team. As part of our team, you will be a part of a unique and efficient group leading Varonis’ DatAdvantage Cloud, as it scales to host and serve thousands of new customers on a pure SaaS infrastructure. You will join an innovative, high
• performance team and work with cutting edge technologies in a dynamic and agile environment. In this role, you will design, build and manage our cloud
• native infrastructure, and play a key role in architecture planning. You will be part of a cross
• continent DevOps Group, which is leading Varonis’s DAC (‘Data Advantage Cloud’), through its way to protect the data of thousands of customers on a pure SaaS infrastructure. You will join a high
• performance team and work with cutting
• edge technologies in a dynamic and agile environment. In this role, you will design, build, and manage our cloud
• native infrastructure, CI/CD, along with architecture planning and innovation. Responsibilities Take an integral part in shaping the future of our enterprise
• scale environment architecture. Provide support and solutions to our growing R&D Groups. Design, build and operate cloud infrastructure to enable reliable, rapid, effective and flexible CI/CD process across all microservices. Develop, and transition the current processes into platform engineering methodologies based on a guardrail and self
• service principles. Develop and maintain observability for all cloud engineering aspects. Establish standards, practices and innovative solutions that will be used across all microservices and help the entire R&D move fast. Work closely with Engineering teams, taking full responsibility and ownership from conception to post
• deployment in a collaborative, fast
• paced environment. Desired Skills & Experience At least 5
• 7 years of experience as a DevOps/SRE/Cloud engineer with passion for technology and a “can do” approach. Extensive experience managing and optimizing Kubernetes ecosystem. Extensive experience working with cloud platforms (AWS preferred); Hands
• on experience in architecting and building infrastructure using cloud
• native technologies to deliver highly available and resilient software systems
• Must High proficiency in code
• Python preferred. Experience in working with Infrastructure as Code (IaC) tools (Terraform preferred). Experience in designing, building, and maintaining CI/CD processes (Such as GitHub Actions, Jenkins). Experience with logging and monitoring solutions (such as Prometheus, Grafana, Datadog). Be proactive with a self
• starter attitude and strong opinions on what is right, as well as a good team player
• you will be part of a super talented and experienced team. Advantage: Experience implementing and automating security controls and compliance validation demanded by the CISO. Advantage: Experience with streaming and queue solutions (Kafka preferred). Advantage: Experience managing SQL and NoSQL DBs (such as MySQL, Elastic, Neo4j, Redis). We invite you to check out our Instagram Page to gain further insight into the Varonis culture! @VaronisLife Varonis is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, national origin, disability, veteran status, and other legally protected characteristics. #LI
• Hybrid #LI
• IOדרישות המשרה
Take an integral part in shaping the future of our enterprise
• scale environment architecture. Provide support and solutions to our growing R&D Groups. Design, build and operate cloud infrastructure to enable reliable, rapid, effective and flexible CI/CD process across all microservices. Develop, and transition the current processes into platform engineering methodologies based on a guardrail and
משרה מס' 390285
-
SoC Physical Design Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ As a member of our Physical Design group, y...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of Apple's ground
• breaking products. You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification. Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology? If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape
• outs in sub
• micron technology, come join our group! Description As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology. * Implementation
• Block level PnR, floor
• planning, clock, power planning and distribution. * Verification and Analysis
• Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR
• Drop / Xtalk / noise ) Preferred Qualifications Knowledge in Verilog
• advantage Minimum Qualifications 3+ years of experience in physical design of large
• scale SoCs B.Sc / M.Sc Electric Engineering / Computer Engineering Extensive experience with one of the place & route tools (Synopsys / Cadence) Scripting and Programming experience using either TCL or Python or Perl, or known Shell scripting languages","internalDetails":null,"eeoContent":nullדרישות המשרה
Knowledge in Verilog
• advantage Minimum Qualifications 3+ years of experience in physical design of large
• scale SoCs B.Sc / M.Sc Electric Engineering / Computer Engineering Extensive experience with one of the place & route tools (Synopsys / Cadence) Scripting and Programming experience using either TCL or Python or Perl, or known Shell scripting languages","internalDetails":null,"eeoContent":n
משרה מס' 390274
-
Compiler Performance Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ The CPU Compiler Performance Team welcomes ...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
The CPU Compiler Performance Team welcomes applications from engineers with different levels of experience, passionate about advancing compiler
• based optimization technologies. Our team is responsible for optimizing the code generation for Apple CPUs. We work across many different organizations, such as Hardware Architecture and OS teams, to generate high
• performance code, tuned to Apple’s unique microarchitecture, to provide the best run
• time performance and battery life to our customers. Most of the team’s work happens directly in the LLVM open
• source project and gets presented at the LLVM Developer Meeting. Our team embodies diversity, collaboration, and creativity. Description In this role, you will be part of a highly motivated group of engineers dedicated to pushing compiler optimization technology to the next level. You will analyze diverse real
• world workloads, including state
• of
• the
• art applications and industry
• standard benchmarks, to find opportunities to optimize the code taking advantage of micro
• architectural features. In this HW/SW co
• design role, you will have the opportunity to influence the architecture and micro
• architecture of future Apple silicon. You will also review and provide feedback on the work of your peers and collaborate with them on solutions to the problems they are working on. In this environment, you will continuously refine your expertise, explore new technologies, and engage in projects that bridge hardware and software teams. Your contributions will have a direct impact on every application running on all Apple devices, and your performance analysis will help guide the development of future platforms. If you believe you have additional skills not listed here that would make you a good candidate for this position, please feel free to include a cover letter describing those skills and their applicability to the position. If this is of interest to you, we'd love to hear from you! Preferred Qualifications Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, maps, and graphs Knowledge of common code optimizations and performance analysis Experience in debugging and testing large production code bases Ability to communicate clearly and effectively","internalDetails":null,"eeoContent":nullדרישות המשרה
Hands
• on experience developing compiler analysis and optimization passes is a big plus Experience working with LLVM or other open source project is a plus Experience in CPU architecture is a plus Experience in collaboration with teams across different organizations and timezones is a plus Minimum Qualifications Strong C++ expertise Knowledge of common data structures like linked lists, sets, map
משרה מס' 390265
-
Senior Java Backend Developer – Data Platform Group
פורסם לפני 4 ימיםשם החברה: Thalesמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ At Thales, we know technology has the abili...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
At Thales, we know technology has the ability to make our world more secure, sustainable, and inclusive
• and that it’s all driven by human intelligence. Because it takes human intelligence to build and power the systems and solutions that people depend on every day. So we stay curious and make space for diverse points of view. We share what we know and we challenge what’s possible. We’re driving progress in some of the world’s most important industries
• from the bottom of the oceans to the depths of space and cyberspace
• and from manufacturing to engineering, we work together to build a future we can all trust. Imperva, a Thales company, is a globally recognized cybersecurity leader, dedicated to securing data and applications across diverse environments. Our cutting
• edge solutions empower organizations to safeguard their most critical assets, ensuring robust protection against emerging threats. Imperva, a Thales company, is a globally recognized cybersecurity leader dedicated to securing data and applications across diverse environments. Our cutting‑edge solutions help organizations protect their most critical assets against emerging threats. Thales believes that technology becomes truly powerful when driven by human intelligence. We value curiosity, diverse perspectives, and bold thinking
• and we are proud to be ranked among Israel’s Top 50 High‑Tech Companies to Work For in 2025 (Dun & Bradstreet) and offer a flexible hybrid work model from our Rehovot office. We’re looking for a Senior Data Platform Engineer to join Imperva’s Data Infrastructure team, building the systems that power our Application Security platform at scale. In this role, you will design and develop the data backbone that processes billions of security events daily, enabling real
• time protection, analytics, and insights for the world’s largest enterprises. Imperva develops cybersecurity solutions that protect critical applications, APIs, and data across cloud and hybrid environments. Our platform operates at massive scale, handling high
• volume, low
• latency data streams with strict reliability and performance requirements. Fortune 500 companies rely on Imperva to secure their most asset
• data. Our stack includes AWS, Kubernetes, Kafka, Spark, RDS, OpenSearch, and Java/Spring Boot, alongside real
• time components built with Go, C, and Linux. About the Role: As a Senior Platform Engineer on the Data Infrastructure team, you will build and evolve large
• scale data systems that ingest, process, store, and serve security data across multiple products. You will take ownership of core data services and pipelines, working on both real
• time and batch processing systems. This includes improving scalability, optimizing performance, and ensuring high availability of critical data flows. You are a hands
• on engineer who enjoys solving complex data challenges and working with distributed systems at scale. Key Responsibilities: Design, build, and maintain scalable data pipelines (real
• time and batch) Develop and optimize systems for high
• throughput, low
• latency data processing Work with streaming technologies (e.g., Kafka) and processing frameworks (e.g., Spark, Flink) Design and manage data storage solutions across relational, NoSQL, and search systems Improve data reliability, consistency, and observability across the platform Collaborate with product teams to enable data
• driven features and analytics Troubleshoot and resolve complex production issues in distributed data systems Continuously improve system performance, scalability, and cost efficiency Contribute to architectural decisions within the data infrastructure domain Requirements: 6+ years of experience as a backend, data, or platform engineer in a cloud
• native environment Strong experience building distributed data systems and pipelines Hands
• on experience with: Streaming systems (Kafka or similar) Backend development (Java, Spring Boot) Cloud platforms (AWS preferred) Solid understanding of distributed systems concepts (scalability, fault tolerance, data consistency) Experience with data storage technologies such as PostgreSQL/RDS, OpenSearch/Elasticsearch, or NoSQL systems Experience with Kubernetes and containerized environments Strong debugging and problem
• solving skills in production systems Good communication skills and ability to collaborate across teams Advantages: Experience with big data frameworks (Spark, Flink, Presto) Familiarity with workflow orchestration tools (Airflow or similar) Experience designing high
• scale event
• driven architectures Knowledge of data modeling and schema design for large
• scale systems Experience with observability tools (logs, metrics, tracing) Exposure to MLOps or data pipelines supporting AI/ML systems Experience with multi
• region deployments and large
• scale cloud architectures Thales, champions inclusion and we believe diversity strengthens the fabric of our culture. We are an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, colour, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.דרישות המשרה
. Fortune 500 companies rely on Imperva to secure their most asset
• data. Our stack includes AWS, Kubernetes, Kafka, Spark, RDS, OpenSearch, and Java/Spring Boot, alongside real
• time components built with Go, C, and Linux. About the Role: As a Senior Platform Engineer on the Data Infrastructure team, you will build and evolve large
• scale data systems that ingest, process, store, and serve sec
משרה מס' 390259
-
PHY Algorithms Developer for Wireless SoC
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ In your role as a senior PHY Algorithms Dev...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
In your role as a senior PHY Algorithms Development Engineer, as part of Apple Connectivity Group, you will be part of a world
• class group that pioneers design and development of Physical Layer algorithms for wireless communication systems for Apple products. We live in a mobile and device driven world where knowledge of the physical world around us is needed. We rely on this knowledge to get around, to learn about our environment and to enable spectacular new features for custom applications. Apple is meeting those needs as robustly and as creatively as possible and is interested in people who want to help meet that commitment. The success we are targeting will be the result of very skilled people working in an environment which cultivates creativity, partnership, and thinking of old problem in new ways. If that sounds like the kind of environment that you find intriguing, then let's talk. Description We are looking for a candidate who can innovate and integrate signal processing technologies for solving novel and diverse sets of problems in various wireless communication and sensing technologies:
• Develop communication signal processing algorithms for best
• in
• class implementation of various wireless standards
• Conduct basic research of existing solutions in literature
• Involvement in block level spec definition
• Perform mathematical analyses of the given problem and its proposed solutions
• Implement floating
• point simulations to prove spec compliance of suggested solutions
• Implement fixed
• point modeling and simulation to allow performance sign
• off and RTL bit
• exact development
• Write detailed design documents that will enable implementation of algorithms by other teams specializing in either RTL design or DSP firmware coding
• Optimize and fine
• tune the system for spec compliance on silicon in an RF lab environment Preferred Qualifications Knowledge in wireless protocols: Bluetooth or WLAN (IEEE 802.11)
• highly preferred Experience in RF lab work and testing equipment (Spectrum, Analyser, Signal Generator, etc.)
• highly preferred Minimum Qualifications M.Sc/Ph.D in Electrical Engineering, Computer Engineering, or related discipline 5+ years of experience and proficiency in C++ programming language Knowledge in digital signal processing algorithms and/or RF systems Proficiency in fixed
• point modeling using C/C++
• mandatory Experience and proficiency with using MATLAB for algorithm development, modeling, and simulation","internalDetails":null,"eeoContent":nullדרישות המשרה
Knowledge in wireless protocols: Bluetooth or WLAN (IEEE 802.11)
• highly preferred Experience in RF lab work and testing equipment (Spectrum, Analyser, Signal Generator, etc.)
• highly preferred Minimum Qualifications M.Sc/Ph.D in Electrical Engineering, Computer Engineering, or related discipline 5+ years of experience and proficiency in C++ programming language Knowledge in digital signal proce
משרה מס' 390243
-
Design Technology Co-Optimization Engineer
פורסם לפני 4 ימיםשם החברה: Googleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Note: By applying to this position you will...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience in Physical Design (RTL
• to
• GDS) or Technology Development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). Experience with industry
• standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. Experience in CMOS device physics, FinFET/nanosheet architectures, and the impact of layout parasitics on PPA. Experience in scripting and automation using Tcl and Python (or Perl) to manage design sweeps and data extraction. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. Experience in Design Technology Co
• Optimization (DTCO), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery). Experience working with major foundry technology files (PDKs) and interpreting Design Rule Manuals (DRM) to guide physical implementation. About the job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting
• edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML
• driven systems. As a Design Technology Co
• Optimization (DTCO) Engineer, you will bridge the gap between process technology and product architecture to define the next generation of data center
• class silicon. You will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures. In this role, you will conduct Place and Route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. You will collaborate with Foundry, IP, and Architecture teams to identify Power, Performance, and Area (PPA) bottlenecks and drive System Technology Co
• Optimization (STCO) initiatives. Your work will involve performing high
• fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify PPA gains. By navigating the trade
• offs between process complexity and design performance, you will ensure Google’s hardware achieves efficiency and power density. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting
• edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world
• leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Responsibilities Execute high
• fidelity Place and Route experiments to evaluate the PPA impact of advanced process features, library architectures, and design rule variations on data center
• class IP. Drive Design Technology Co
• Optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track heights, and scaling boosters (e.g., backside power delivery, buried power rails). Quantify process entitlement through systematic benchmarking of logic and memory macros, identifying bottlenecks in power density and timing closure for next
• generation nodes. Develop automated physical design methodologies and flows to accelerate technology pathfinding and enable rapid what
• if analysis of emerging transistor architectures. Influence System Technology Co
• Optimization by partnering with Hardware Architects and Circuit Designers to translate process
• level innovations into system
• level performance gains. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.דרישות המשרה
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience in Physical Design (RTL
• to
• GDS) or Technology Development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). Experience with industry
• standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. Experience in C
משרה מס' 390232
-
PHY Firmware Technical Leader
פורסם לפני 4 ימיםשם החברה: Ciscoמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Meet the Team Join theCisco Silicon One PHY...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Meet the Team Join theCisco Silicon One PHY System team, part of Cisco’s core silicon development group. Our team is responsible for PHY and system
• level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post
• silicon validation. We work with the latest silicon technologies and processes to build large
• scale, highly complex devices at the edge of feasibility. You’ll be part of a unique design center that hostsall silicon HW and SW disciplines under one roof, operating in a startup
• like environment within a stable, world
• leading company. Cisco Silicon One™ is transforming the industry with a unified, programmable silicon architecture that powers Cisco’s future routing portfolio and helps shape the Internet for decades to come. Your Impact
• Develop PHY firmware and system
• level features for advanced networking ASICs
• Participate in post
• silicon validation, including lab bring
• up, debugging, and performance analysis
• Collaborate closely with PHY, system, firmware, and silicon design teams
• Contribute to defining system operation modes and end
• to
• end device behavior
• Help drive the development of next
• generation, high
• scale networking solutions using cutting
• edge silicon technologies Who You’ll Work With
• The Cisco Silicon One group, the center of Cisco’s ASIC design efforts
• Cross
• functional teams including silicon design, firmware, and system
• Global teams working together to deliver game
• changing networking devices Minimum Qualifications
• B.Sc. or M.Sc. in Electrical Engineering or Computer Science from a top university
• 8+ years of relevant experience in system and firmware.
• Strong system
• oriented mindset with a multi
• disciplinary approach
• Ability to work on complex problems while multitasking across domains Preferred Qualifications
• Experience withC++, Python.
• Familiarity with processor architecture
• Experience working in cross
• functional, fast
• paced development environments Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era
• and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you.דרישות המשרה
• B.Sc. or M.Sc. in Electrical Engineering or Computer Science from a top university
• 8+ years of relevant experience in system and firmware.
• Strong system
• oriented mindset with a multi
• disciplinary approach
• Ability to work on complex problems while multitasking across domains Preferred Qualifications
• Experience withC++, Python.
• Familiarity with processor architecture
• Experience wor
משרה מס' 390219
-
DevOps Engineer
פורסם לפני 4 ימיםשם החברה: Varonis Systemsמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Summary Data has never been more valuable a...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Summary Data has never been more valuable and vulnerable. As cybercriminals become more sophisticated and regulations more strict, organizations struggle to answer one key question: “Is my data safe?" At Varonis, we see the world of cybersecurity differently. Instead of chasing threats, we believe the most practical approach is protecting data from the inside out. We’ve built the industry’s first fully autonomous Data Security Platform to help our customers dramatically reduce risk with minimal human effort. At Varonis, we move fast. We’re an ultra
• collaborative company with brilliant people who care deeply about the details. Together, we’re solving interesting and complex puzzles to keep the world’s data safe. We work in a flexible, hybrid model, so you can choose the home
• office balance that works best for you. We are looking for a skilled and motivated DevOps engineer to join our DevOps team. As part of our team, you will be a part of a unique and efficient group leading Varonis’ DatAdvantage Cloud, as it scales to host and serve thousands of new customers on a pure SaaS infrastructure. You will join an innovative, high
• performance team and work with cutting edge technologies in a dynamic and agile environment. In this role, you will design, build and manage our cloud
• native infrastructure, and play a key role in architecture planning. You will be part of a cross
• continent DevOps Group, which is leading Varonis’s DAC (‘Data Advantage Cloud’), through its way to protect the data of thousands of customers on a pure SaaS infrastructure. You will join a high
• performance team and work with cutting
• edge technologies in a dynamic and agile environment. In this role, you will design, build, and manage our cloud
• native infrastructure, CI/CD, along with architecture planning and innovation. Responsibilities Take an integral part in shaping the future of our enterprise
• scale environment architecture. Provide support and solutions to our growing R&D Groups. Design, build and operate cloud infrastructure to enable reliable, rapid, effective and flexible CI/CD process across all microservices. Develop, and transition the current processes into platform engineering methodologies based on a guardrail and self
• service principles. Develop and maintain observability for all cloud engineering aspects. Establish standards, practices and innovative solutions that will be used across all microservices and help the entire R&D move fast. Work closely with Engineering teams, taking full responsibility and ownership from conception to post
• deployment in a collaborative, fast
• paced environment. Desired Skills & Experience At least 5
• 7 years of experience as a DevOps/SRE/Cloud engineer with passion for technology and a “can do” approach. Extensive experience managing and optimizing Kubernetes ecosystem. Extensive experience working with cloud platforms (AWS preferred); Hands
• on experience in architecting and building infrastructure using cloud
• native technologies to deliver highly available and resilient software systems
• Must High proficiency in code
• Python preferred. Experience in working with Infrastructure as Code (IaC) tools (Terraform preferred). Experience in designing, building, and maintaining CI/CD processes (Such as GitHub Actions, Jenkins). Experience with logging and monitoring solutions (such as Prometheus, Grafana, Datadog). Be proactive with a self
• starter attitude and strong opinions on what is right, as well as a good team player
• you will be part of a super talented and experienced team. Advantage: Experience implementing and automating security controls and compliance validation demanded by the CISO. Advantage: Experience with streaming and queue solutions (Kafka preferred). Advantage: Experience managing SQL and NoSQL DBs (such as MySQL, Elastic, Neo4j, Redis). We invite you to check out our Instagram Page to gain further insight into the Varonis culture! @VaronisLife Varonis is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, national origin, disability, veteran status, and other legally protected characteristics. #LI
• Hybrid #LI
• IOדרישות המשרה
Take an integral part in shaping the future of our enterprise
• scale environment architecture. Provide support and solutions to our growing R&D Groups. Design, build and operate cloud infrastructure to enable reliable, rapid, effective and flexible CI/CD process across all microservices. Develop, and transition the current processes into platform engineering methodologies based on a guardrail and
משרה מס' 390216
-
Firmware WiFi Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Do you imagine what you could do here? At A...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Do you imagine what you could do here? At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Every single day, people do amazing things at Apple. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple products. Apple is looking for an extraordinary FW engineer to drive state of the art technologies for Apple products. In this role, you will work with a variety of disciplines and products, developing software and firmware at the WiFi MAC Level. You'll ensure that every aspect of our products works both on its own and together. It’s our goal to make Apple products smarter and more efficient than ever before. Join us, and you’ll directly impact the functionality of devices people use worldwide. Description As a senior WiFi MAC Software Engineer, your contributions will include the following: Writing design documents. Designing and implementing software and firmware for WiFi and 802.11 MAC Level features at the MAC. Optimise and fine
• tune the firmware and MAC Level algorithms. Involvement in firmware architecture design, and system level requirements from top
• level down to block level. Develop and support OSX development tools and kernel drivers. This role requires high sense of responsibility and ability to work in team. The people who work here have reinvented and defined entire industries with our products and services. The same passion for innovation also applies to our practices
• strengthening our commitment to leave the world better than we found it. You should join us if you want to help deliver the next amazing Apple product!. Preferred Qualifications Experience with developing mobile products and protocols, WiFi, BT, Cellular, etc. Experience using other common programming languages, such as Objective
• C, Java, C++, Python. Experience with ARM micro
• controllers. Experience with development in OSX and iOS environments. Minimum Qualifications 5+ years of Low Level Embedded software/firmware development
• Mandatory. Experience and proficiency in C development
• Mandatory. Experience with communications protocols and host I/F such as TCP/IP, UDP, USB, PCIe, UART et. Exceptional problem solving and debugging skills. Independent, highly motivated, with good interpersonal skills. B.Sc or higher degree in Computer Science or technically equivalent field is required.","internalDetails":null,"eeoContent":nullדרישות המשרה
from top
• level down to block level. Develop and support OSX development tools and kernel drivers. This role requires high sense of responsibility and ability to work in team. The people who work here have reinvented and defined entire industries with our products and services. The same passion for innovation also applies to our practices
• strengthening our commitment to leave the world better t
משרה מס' 390212
-
Design Technology Co-Optimization Engineer
פורסם לפני 4 ימיםשם החברה: Googleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Note: By applying to this position you will...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience in Physical Design (RTL
• to
• GDS) or Technology Development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). Experience with industry
• standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. Experience in CMOS device physics, FinFET/nanosheet architectures, and the impact of layout parasitics on PPA. Experience in scripting and automation using Tcl and Python (or Perl) to manage design sweeps and data extraction. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. Experience in Design Technology Co
• Optimization (DTCO), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery). Experience working with major foundry technology files (PDKs) and interpreting Design Rule Manuals (DRM) to guide physical implementation. About the job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting
• edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML
• driven systems. As a Design Technology Co
• Optimization (DTCO) Engineer, you will bridge the gap between process technology and product architecture to define the next generation of data center
• class silicon. You will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures. In this role, you will conduct Place and Route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. You will collaborate with Foundry, IP, and Architecture teams to identify Power, Performance, and Area (PPA) bottlenecks and drive System Technology Co
• Optimization (STCO) initiatives. Your work will involve performing high
• fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify PPA gains. By navigating the trade
• offs between process complexity and design performance, you will ensure Google’s hardware achieves efficiency and power density. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting
• edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world
• leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Responsibilities Execute high
• fidelity Place and Route experiments to evaluate the PPA impact of advanced process features, library architectures, and design rule variations on data center
• class IP. Drive Design Technology Co
• Optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track heights, and scaling boosters (e.g., backside power delivery, buried power rails). Quantify process entitlement through systematic benchmarking of logic and memory macros, identifying bottlenecks in power density and timing closure for next
• generation nodes. Develop automated physical design methodologies and flows to accelerate technology pathfinding and enable rapid what
• if analysis of emerging transistor architectures. Influence System Technology Co
• Optimization by partnering with Hardware Architects and Circuit Designers to translate process
• level innovations into system
• level performance gains. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.דרישות המשרה
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience in Physical Design (RTL
• to
• GDS) or Technology Development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). Experience with industry
• standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. Experience in C
משרה מס' 390211
-
DevOps Engineer
פורסם לפני 4 ימיםשם החברה: Varonis Systemsמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Summary Data has never been more valuable a...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Summary Data has never been more valuable and vulnerable. As cybercriminals become more sophisticated and regulations more strict, organizations struggle to answer one key question: “Is my data safe?" At Varonis, we see the world of cybersecurity differently. Instead of chasing threats, we believe the most practical approach is protecting data from the inside out. We’ve built the industry’s first fully autonomous Data Security Platform to help our customers dramatically reduce risk with minimal human effort. At Varonis, we move fast. We’re an ultra
• collaborative company with brilliant people who care deeply about the details. Together, we’re solving interesting and complex puzzles to keep the world’s data safe. We work in a flexible, hybrid model, so you can choose the home
• office balance that works best for you. We are looking for a skilled and motivated DevOps engineer to join our DevOps team. As part of our team, you will be a part of a unique and efficient group leading Varonis’ DatAdvantage Cloud, as it scales to host and serve thousands of new customers on a pure SaaS infrastructure. You will join an innovative, high
• performance team and work with cutting edge technologies in a dynamic and agile environment. In this role, you will design, build and manage our cloud
• native infrastructure, and play a key role in architecture planning. You will be part of a cross
• continent DevOps Group, which is leading Varonis’s DAC (‘Data Advantage Cloud’), through its way to protect the data of thousands of customers on a pure SaaS infrastructure. You will join a high
• performance team and work with cutting
• edge technologies in a dynamic and agile environment. In this role, you will design, build, and manage our cloud
• native infrastructure, CI/CD, along with architecture planning and innovation. Responsibilities Take an integral part in shaping the future of our enterprise
• scale environment architecture. Provide support and solutions to our growing R&D Groups. Design, build and operate cloud infrastructure to enable reliable, rapid, effective and flexible CI/CD process across all microservices. Develop, and transition the current processes into platform engineering methodologies based on a guardrail and self
• service principles. Develop and maintain observability for all cloud engineering aspects. Establish standards, practices and innovative solutions that will be used across all microservices and help the entire R&D move fast. Work closely with Engineering teams, taking full responsibility and ownership from conception to post
• deployment in a collaborative, fast
• paced environment. Desired Skills & Experience At least 5
• 7 years of experience as a DevOps/SRE/Cloud engineer with passion for technology and a “can do” approach. Extensive experience managing and optimizing Kubernetes ecosystem. Extensive experience working with cloud platforms (AWS preferred); Hands
• on experience in architecting and building infrastructure using cloud
• native technologies to deliver highly available and resilient software systems
• Must High proficiency in code
• Python preferred. Experience in working with Infrastructure as Code (IaC) tools (Terraform preferred). Experience in designing, building, and maintaining CI/CD processes (Such as GitHub Actions, Jenkins). Experience with logging and monitoring solutions (such as Prometheus, Grafana, Datadog). Be proactive with a self
• starter attitude and strong opinions on what is right, as well as a good team player
• you will be part of a super talented and experienced team. Advantage: Experience implementing and automating security controls and compliance validation demanded by the CISO. Advantage: Experience with streaming and queue solutions (Kafka preferred). Advantage: Experience managing SQL and NoSQL DBs (such as MySQL, Elastic, Neo4j, Redis). We invite you to check out our Instagram Page to gain further insight into the Varonis culture! @VaronisLife Varonis is an equal opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, national origin, disability, veteran status, and other legally protected characteristics. #LI
• Hybrid #LI
• IOדרישות המשרה
Take an integral part in shaping the future of our enterprise
• scale environment architecture. Provide support and solutions to our growing R&D Groups. Design, build and operate cloud infrastructure to enable reliable, rapid, effective and flexible CI/CD process across all microservices. Develop, and transition the current processes into platform engineering methodologies based on a guardrail and
משרה מס' 390210
-
Senior ML Data Engineer – AV Dataset
פורסם לפני 4 ימיםשם החברה: Mobileyeמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ The AI Engineering group builds modern infr...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
The AI Engineering group builds modern infrastructure and solutions that improve how algorithms are developed at Mobileye. We are a small, independent team of experienced engineers with a mix of skills in algorithms, software, and infrastructure. We work in a DevOps style and build cross
• team solutions that support research and development of advanced perception algorithms. Our flagship project is a unified AV dataset used to train and evaluate next
• generation models. We take large volumes of multi
• camera video, object labels, HD maps, and sensor data from across the organization, and turn it into a curated, high
• quality training set
• at scale. We are looking for someone who brings ML and computer
• vision depth to the team
• someone who can help shape the intelligence layer that decides what data is worth training on. What will your job look like: Work collaboratively with shared ownership. Your focus area will be the curation and ML side of our data pipeline, but you will contribute across the full stack alongside the rest of the team. Build and improve the curation pipeline
• from vision
• model embeddings and scene detection, through VLM
• based scene analysis, to scoring, deduplication, and sampling that produces a balanced and diverse dataset. Run and optimize GPU inference at scale (embedding extraction, VLM inference) across thousands of driving sessions using workflow orchestration. Develop scoring and sampling strategies that ensure rare but important scenarios (night driving, adverse weather, hazardous situations) are well
• represented in the final dataset. Work with algorithm teams to understand what data gaps hurt model performance and translate those into curation criteria. Build validation and diagnostics that measure dataset quality
• not just pipeline health, but whether the data is actually good for training. Contribute to the core dataset SDK, converter, and 3D
• geometry tooling (camera projection, calibration, coordinate transforms). All you need is: 4+ years in ML engineering, applied CV, or a similar role combining model work with production data systems. Hands
• on experience with vision models
• embeddings, VLMs, or object detection/segmentation. Strong Python and comfort with the PyData stack (NumPy, PyArrow, Pandas, DuckDB). Experience building data or ML pipelines that run at scale (not just notebooks). Solid understanding of 3D geometry and camera models
• or the mathematical background to ramp up quickly. Good understanding of LLM agents and agentic workflows, with genuine interest in applying them to data and engineering problems. Ability to work across team boundaries with algorithm and infrastructure people. Strong advantage: Experience with autonomous
• driving datasets or perception pipelines. Familiarity with dataset curation techniques (active learning, hard
• example mining, distribution balancing). Experience with GPU inference serving (vLLM, Triton, TensorRT). Familiarity with vector databases or columnar analytics (LanceDB, DuckDB). Experience with workflow orchestration (Argo, Airflow, Kubeflow) We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.דרישות המשרה
לא צויין
משרה מס' 390201
-
Senior DevOps Engineer
פורסם לפני 4 ימיםשם החברה: Hub Technologiesמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ R&D Tel Aviv Description About the Role We ...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
R&D Tel Aviv Description About the Role We are looking for a DevOps Engineer, someone driven by impact, passionate about high
• quality delivery, and confident taking ownership from concept to production. A self
• motivated problem solver who continuously seeks smarter, faster, and more secure ways to build and operate cloud environments, while collaborating closely with development, security, and IT teams to achieve operational excellence. Key Responsibilities Architect, develop, and maintain scalable and secure cloud infrastructure on AWS and Azure Design, implement, and manage Infrastructure as Code using Terraform (modules, workspaces, remote state) Build, enhance, and optimize CI/CD pipelines using GitHub Actions Integrate security tools into CI/CD workflows (SAST, DAST, dependency & secrets scanning) Monitor system health, performance, and availability
• ensuring reliability and resilience through automation Apply FinOps practices to optimize cloud cost and utilization Work cross
• functionally to ensure efficient delivery and smooth operations Take full ownership of initiatives from planning to production while proactively improving existing processes and systems Requirements Must
• Have Skills 5+ years of experience as a DevOps Engineer Strong expertise with AWS and Azure cloud platforms Hands
• on experience with Terraform and CI/CD integrations Advanced knowledge of GitHub & GitHub Actions CI/CD security best practices including: Snyk, Aqua Security, Trivy, Checkov, Prisma Cloud, SonarQube, OWASP ZAP (or similar) Experience implementing SAST/DAST, container scanning, IaC security scanning, secrets detection Docker & Kubernetes experience (EKS / AKS) Experience with serverless technologies (AWS Lambda / Azure Functions) Strong networking knowledge: VPC, IAM, Firewalls, VPN, Load Balancers Linux administration and scripting (Bash / Python / PowerShell) Monitoring & logging: Prometheus, Grafana, ELK, CloudWatch, Azure Monitor A proactive, ownership
• driven mindset with the ability to independently push initiatives forward, continuously improve processes, and deliver high
• quality results end
• to
• end Nice to Have Experience with configuration management tools (Ansible, Puppet, Chef) Familiarity with cloud database services (RDS, DynamoDB, Azure SQL, Cosmos DB) Experience with Zero Trust security and secrets management solutions (Vault, AWS SM, Azure Key Vault) Background in high availability, backup & disaster recovery architecture Soft Skills & Mindset Highly motivated, self
• driven, and eager to grow Strong problem
• solving capabilities with attention to detail Proactive in identifying issues and driving improvements Excellent communication skills and a collaborative mindset Able to balance big
• picture thinking with hands
• on execution Values accountability, quality, and continuous improvementדרישות המשרה
Architect, develop, and maintain scalable and secure cloud infrastructure on AWS and Azure Design, implement, and manage Infrastructure as Code using Terraform (modules, workspaces, remote state) Build, enhance, and optimize CI/CD pipelines using GitHub Actions Integrate security tools into CI/CD workflows (SAST, DAST, dependency & secrets scanning) Monitor system health, performance, and availabi
משרה מס' 390193
-
CAD -Physical Design
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ As a PNR/PD • CAD team member, you will hav...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
As a PNR/PD
• CAD team member, you will have an impact on a wide range of activities and domains in the PD world. The team develops and supports utilities that enable an efficient work environment for the physical design teams across the world. Description The role includes exploring new technologies and methodologies of first
• of
• its
• kind designs, and the complex implementation of designs from small ones to the largest possible. The job includes hands
• on work and impact on all aspects of the design cycle, from infrastructure
• related automation for design efficiency through developing internal PNR flows, which will enable improved designs
• from PNR implementation through developing infra, signoff flows & verification utilities.","responsibilities":"The job includes constant work with different teams and disciplines that interface with the PNR world, which includes Timing, power delivery, synthesis, Physical Verification, and more. Along with the different disciplines, you will work with different teams, from vendors, PD team members and other CAD team members and discipline owners across the world to enable and improve the productivity of the PD flows. Preferred Qualifications BSc/ MSc in Electrical Engineering or Computer Science. Minimum Qualifications 5+ years experience in ASIC P&R and flow development Experience with all aspects of ASIC physical design, including floorplanning, power
• distribution, multi
• voltage design, placement, CTS, and routing. Strong TCL/Python scripting skills and LLM/GenAI implementation methods. Candidate should have experience developing complex algorithms, managing, and regressing P&R flows. The candidate should be familiar with design signoff issues. Hands
• on Innovus experience","internalDetails":null,"eeoContent":nullדרישות המשרה
":"The job includes constant work with different teams and disciplines that interface with the PNR world, which includes Timing, power delivery, synthesis, Physical Verification, and more. Along with the different disciplines, you will work with different teams, from vendors, PD team members and other CAD team members and discipline owners across the world to enable and improve the productivity of
משרה מס' 390176
-
Performance Modeling Architect
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Passion and dedication to your work can lea...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Passion and dedication to your work can lead to remarkable accomplishments. This environment fosters dynamic, intelligent individuals and inspires innovative technologies. We seek a highly motivated and hands
• on Architect with a passion for performance engineering and performance modeling of sophisticated SoC features. You will join a team of exceptional engineers and collaborate daily with software and hardware engineering teams across Apple. Description As a member of the Platform Architecture team, you will collaborate with the uArchitecture, Design, and Core Software teams to define next
• generation architectural features that will enhance the performance of Mac products. You will analyze user workloads to identify critical factors impacting user performance, analyze performance bottlenecks, and explore potential solutions. You will model new features and evaluate the trade
• offs associated with their implementation. Develop and implement a C++ model and integrate it with various agent models and software simulation platforms. You will correlate the performance of the model with the RTL implementation. Preferred Qualifications Ability to conduct experiments in all phases of design, gathering and analyzing data; and to utilize scripting/spreadsheet to document and present results Knowledge and experience with common performance benchmarks and workloads Minimum Qualifications BS.c in EE, CS or CE is Required Strong SoC architecture knowledge, micro
• architecture knowledge, and an understanding of competing architectures Experience working in a performance modeling environment Strong knowledge and proficiency in software development in C/C++ Proficient in scripting languages such as Perl and Python","internalDetails":null,"eeoContent":nullדרישות המשרה
Ability to conduct experiments in all phases of design, gathering and analyzing data; and to utilize scripting/spreadsheet to document and present results Knowledge and experience with common performance benchmarks and workloads Minimum Qualifications BS.c in EE, CS or CE is Required Strong SoC architecture knowledge, micro
• architecture knowledge, and an understanding of competing architectures
משרה מס' 390173
-
Low-level Software Engineer, Platform Architecture
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Imagine what you can do here. At Apple, new...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Imagine what you can do here. At Apple, new ideas have a way of becoming extraordinary products very quickly. Bring passion and dedication to your job, and there’s no telling what we can accomplish together. Do you love crafting elegant solutions to highly complex challenges? Can you intrinsically see the importance of every detail? At Apple, our Platform Architecture group is responsible for connecting our hardware and software into one unified system. Join this team, and you’ll collaborate with engineers across Apple to build and deploy software systems that contribute to the development of our world
• renowned hardware and software architecture. You and your team will deliver tools and frameworks used by OS developers and hardware architects. Together, our work will be the reason millions of customers enjoy their devices every single day. Description Apple’s Platform Architecture group is seeking a software engineer to build high
• performance software models of advanced SoC designs and to help bridge the gap between Software and Hardware, influencing performance improvements, power efficiency, security, and the programming ease of Apple products.","responsibilities":"In this role, you will: Develop software systems and tools used to bring up the future OS on future SoCs Support kernel and driver development on future processor & SoC models Work closely with software and hardware teams across product and research groups Promote new opportunities and techniques with other groups Preferred Qualifications Degree in Computer Science or Computer Engineering. Experience with kernel, driver and firmware development. Experience with modeling and simulation. Assembly experience. Knowledge of modern SoC architectures. Experience collaborating with cross
• functional teams to achieve scheduled milestones. Minimum Qualifications 2 years experience with programming (C++/C) and scripting skills (Python). (MSc graduates may be considered without prior industry experience) Background in low
• level software, operating systems, or compilers. Experience developing and debugging large, complex system software. Experience with concurrent and parallel programming. Knowledge of ARM and/or X86 architecture.","internalDetails":null,"eeoContent":nullדרישות המשרה
":"In this role, you will: Develop software systems and tools used to bring up the future OS on future SoCs Support kernel and driver development on future processor & SoC models Work closely with software and hardware teams across product and research groups Promote new opportunities and techniques with other groups Preferred Qualifications Degree in Computer Science or Computer Engineering. Expe
משרה מס' 390169
-
Design Technology Co-Optimization Engineer
פורסם לפני 4 ימיםשם החברה: Googleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Note: By applying to this position you will...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience in Physical Design (RTL
• to
• GDS) or Technology Development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). Experience with industry
• standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. Experience in CMOS device physics, FinFET/nanosheet architectures, and the impact of layout parasitics on PPA. Experience in scripting and automation using Tcl and Python (or Perl) to manage design sweeps and data extraction. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. Experience in Design Technology Co
• Optimization (DTCO), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery). Experience working with major foundry technology files (PDKs) and interpreting Design Rule Manuals (DRM) to guide physical implementation. About the job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting
• edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML
• driven systems. As a Design Technology Co
• Optimization (DTCO) Engineer, you will bridge the gap between process technology and product architecture to define the next generation of data center
• class silicon. You will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures. In this role, you will conduct Place and Route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. You will collaborate with Foundry, IP, and Architecture teams to identify Power, Performance, and Area (PPA) bottlenecks and drive System Technology Co
• Optimization (STCO) initiatives. Your work will involve performing high
• fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify PPA gains. By navigating the trade
• offs between process complexity and design performance, you will ensure Google’s hardware achieves efficiency and power density. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting
• edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world
• leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Responsibilities Execute high
• fidelity Place and Route experiments to evaluate the PPA impact of advanced process features, library architectures, and design rule variations on data center
• class IP. Drive Design Technology Co
• Optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track heights, and scaling boosters (e.g., backside power delivery, buried power rails). Quantify process entitlement through systematic benchmarking of logic and memory macros, identifying bottlenecks in power density and timing closure for next
• generation nodes. Develop automated physical design methodologies and flows to accelerate technology pathfinding and enable rapid what
• if analysis of emerging transistor architectures. Influence System Technology Co
• Optimization by partnering with Hardware Architects and Circuit Designers to translate process
• level innovations into system
• level performance gains. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.דרישות המשרה
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience in Physical Design (RTL
• to
• GDS) or Technology Development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). Experience with industry
• standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. Experience in C
משרה מס' 390168
-
MacOS SW Application Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Apple Israel seeks a talented Software Engi...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Apple Israel seeks a talented Software Engineer to build innovative internal systems and macOS native applications that power Apple's next generation of products. You'll collaborate with a diverse, multi
• disciplinary engineering team working across various domains and technologies
• contributing directly to cutting
• edge innovation. In this role, you'll take ownership of the full development lifecycle: designing, analyzing, implementing, testing, and integrating features across both backend and frontend systems. You'll combine technical expertise with user
• centered thinking, translating user needs into elegant, impactful solutions. Description Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants. Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Preferred Qualifications Proven track record of delivering results under pressure while managing multiple priorities and tight deadlines Experience with Swift or Python (preferred) Minimum Qualifications B.Sc or M.Sc in Computer Science or related field (or equivalent professional experience) 3+ years of professional software development experience Proficiency and practical experience with C++ Strong object
• oriented programming fundamentals Excellent written and verbal communication skills, with the ability to present ideas clearly to technical and non
• technical audiences Demonstrated interpersonal and organizational abilities","internalDetails":null,"eeoContent":nullדרישות המשרה
Proven track record of delivering results under pressure while managing multiple priorities and tight deadlines Experience with Swift or Python (preferred) Minimum Qualifications B.Sc or M.Sc in Computer Science or related field (or equivalent professional experience) 3+ years of professional software development experience Proficiency and practical experience with C++ Strong object
• oriented pro
משרה מס' 390165
-
Creative AI Student Role
פורסם לפני 4 ימיםשם החברה: Lightricksמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Who we are Lightricks is an AI • first comp...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Who we are Lightricks is an AI
• first company creating next
• generation content creation technology for businesses, enterprises, and studios, with a mission to bridge the gap between imagination and creation. At our core is LTX
• 2, an open
• source generative video model built to deliver expressive, high
• fidelity video at unmatched speed. It powers both our own products and a growing ecosystem of partners. The company is also known globally for pioneering consumer creativity through products like Facetune, one of the world's most recognized creative brands, which introduced AI
• powered visual expression to hundreds of millions of users worldwide. We combine deep research, user
• first design, and end
• to
• end execution
• from concept to final render
• to bring the future of expression to all. About the Creative AI Track Creative AI sits between Product, Marketing, and R&D. We explore advanced AI capabilities and turn them into meaningful, usable, high
• quality creative experiences. Some teams focus more on product
• facing AI experiences (shaping how technology feels inside our tools). Others focus on marketing innovationת creative automation and enabling partners and clients to get the most out of our AI capabilities. As a student, you will join one of our Creative AI teams based on your strengths and interests. Your manager will introduce you to the team's workflow, tools, and business needs. Across all teams, the common thread is the same: You don't just use AI tools
• you shape how they work. Why is this role special? Real exposure to production
• grade generative AI systems Work at the intersection of art, code, product, and research High ownership and fast iteration Freedom to experiment and bring new ideas Direct impact on how a global creative company uses AI internally and externally What you will be doing You will join one of our AI
• driven Creative teams across Product or Marketing. Your manager will introduce you to the team's workflows, tools, and business objectives, whether that means shaping product
• facing AI features, building creative infrastructure for marketing, creating AI
• powered marketing assets, or experimenting with new generative capabilities around our models. Based on the team's focus and current priorities, your day
• to
• day work may include: AI Experimentation & Prompt Logic Design prompt structures and system logic that translate ideas into high
• quality visual outputs Experiment with image and video generation models Improve results through parameter tuning, workflow optimization, or LoRa training Evaluate outputs with a strong aesthetic and brand
• sensitive eye Creative Prototyping & Tool Building Build internal mini
• apps, scripts, or lightweight tools Rapidly prototype using AI
• assisted coding tools (Cursor, Claude Code, Copilot, etc.) Connect and orchestrate APIs (OpenAI, Gemini, Claude, fal.ai, Replicate, etc.) Develop and experiment with ComfyUI workflows and custom nodes Think like a tool
• maker
• design solutions that scale and empower others, not just one
• off outputs. Automation & Creative Infrastructure Improve workflows for designers, marketers, and video teams Integrate AI automations into creative pipelines Support product or marketing releases by solving technical
• creative challenges On some teams, serve as a technical AI advisor: helping creative partners, sales, or business development teams get the most out of our generative models Research & Exploration Explore emerging GenAI tools and models Benchmark quality, usability, and creative potential Identify opportunities to raise the bar for polish and control Creative Marketing Design Create AI
• powered video content for marketing campaigns, product showcases, and social channels Integrate generative AI tools directly into production workflows to produce scalable, high
• quality assets Edit short
• form and mid
• form video optimized for engagement and retention Your skills and experience You might be a strong fit if: You're currently pursuing a degree that combines design and technology, such as Visual Communication & Computer Science, or a similar interdisciplinary program, bringing both creative and technical expertise and you have at least one full year of studies ahead. You are deeply curious about AI and creative technology You enjoy building, experimenting, and understanding systems You have strong visual sensitivity and can critically evaluate creative outputs You are comfortable moving between creative thinking and technical execution You are not intimidated by new tools or technical environments Technical background (strong advantage) Python and/or JavaScript Experience with AI
• assisted coding tools API integrations ComfyUI workflows Stable Diffusion or video generation models Background in video, motion, VFX, or interactive media Adobe AE and Premiere experience Coding experience is a strong advantage, but what matters most is your ability to think technically and creatively at the same time. What to include in your application: In addition to your CV, please include: A portfolio (mandatory) showing creative thinking and hands
• on experimentation At least one project that meaningfully integrates AI into the creative process (prompt design, workflow building, scripting, parameter tuning, model experimentation, etc.) A short explanation of one project: What problem did you encounter? What did you build or experiment with? How did you solve it? Projects can come from school, personal work, hackathons, or side experiments. Depth and process matter more than quantity. Why join us: We're here to push the boundaries of what's possible with AI and video
• not for the buzz, but for the craft, the challenge, and the chance to make something genuinely new. We believe in an environment where people are encouraged to think, create and explore. Real impact happens when people are empowered to experiment, evolve, and elevate together. At Lightricks, every breakthrough starts with great people and a collaborative mindset. If you're looking for a place that combines deep tech, creative energy, and zero buzzword culture, you might be in the right place. We got you covered! We empower employees with cutting
• edge tools and learning opportunities to grow and succeed through workshops, access and training on platforms, subscriptions, and clear guidelines for responsible AI use. We offer Car
• to
• go subscriptions and run daily door
• to
• door shuttles from several locations in central Israel, plus free parking and train
• station pickups. We're proud to have 2 chef
• led restaurants on site by the legendary Machneyuda Group (yes, that Machneyuda!), plus a bakery nestled in the heart of our office, filled daily with the scent of fresh pastries. Short Q&A Is this a design role? Not in the traditional sense. This role focuses on shaping AI
• driven creative systems and outputs, not designing product screens. That said, a strong eye for design and visual capabilities are essential. Do I need strong coding experience? Coding is a strong advantage, but curiosity, experimentation, and comfort with technology are just as important. Do I need to show AI work in my portfolio? Yes. At least one project should demonstrate meaningful integration of AI into the creative process. Can projects be personal or experimental? Absolutely. We value initiative and experimentation, not only formal coursework.דרישות המשרה
לא צויין
משרה מס' 390164
-
Design Engineer for SOC Group
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ In this role you will be familiar with cutt...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
In this role you will be familiar with cutting edge power management techniques including power management ICs control schemes, Chip power state transitions, SoC boot process and HW security solutions. You will define uArch spec, implement HW including RTL and UPF coding, synthesize the digital design to the latest process nodes and participate in the implementation process. Description Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple.Do you want to join us to help deliver the next groundbreaking Apple products? The Apple SoC design team is looking for an experienced engineer to develop Apple's compute SoCs power management system. Role expectations include working with partner Design teams, Physical design, verification, Platform Architecture and Software teams to define the power system micro architecture, implement the required HW and integrate it to a complex multi chip system. Preferred Qualifications BS.c/ MS.c in EE/ CE Minimum Qualifications 3+ years of experience in digital design (preferably in SoC) Familiar with advanced design practices (clock/voltage domain crossing, low power design and DFT)
• Advantage Familiar with various chip development tools (e.g. lint, synthesis, STA) Familiar with verification methodologies Strong Verilog/System Verilog skills Experienced with scripting using common languages (e.g. Python, Perl, TCL)","internalDetails":null,"eeoContent":nullדרישות המשרה
BS.c/ MS.c in EE/ CE Minimum Qualifications 3+ years of experience in digital design (preferably in SoC) Familiar with advanced design practices (clock/voltage domain crossing, low power design and DFT)
• Advantage Familiar with various chip development tools (e.g. lint, synthesis, STA) Familiar with verification methodologies Strong Verilog/System Verilog skills Experienced with scripting using c
משרה מס' 390163
-
מנהל/ת מערכות גיבויים ושרידות עסקית
פורסם לפני 4 ימיםשם החברה: Technion - Israel Institute of Technologyמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ תאור התפקיד כפיפות: מנהל מחלקת מערכות ליבה ...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
תאור התפקיד כפיפות: מנהל מחלקת מערכות ליבה באגף תשתיות ותפעול. העבודה כוללת עבודה משותפת עם כל צוותי המחשוב באגף ובמערך, עם יחידות אקדמיות ומנהליות ועם ספקים טכנולוגיים, לצורך ניהול ותפעול שוטף של תהליכי גיבוי ושרידות עסקית. תיאור התפקיד: ü ניהול ותפעול וניהול מערכות ותשתיות גיבויים ו אחסון נתונים ü ניהול, תחזוקה ושדרוג של מערכות LINUX ü עבודה מול צוותי אבטחת מידע, פיתוח ותשתיות ü ניהול ואחריות לכל תהליכי הגיבויים והשרידות העסקית הכישורים הדרושים ü תואר רלוונטי, לחילופין 3 שנים ניסיון ומעלה בתחומים הנ"ל ü ניסיון במערכות גיבוי ארגוניות , יתרון למערכות VEEAM ü ניסיון בסביבות וירטואליות בכלל ובמערכות VMwareבפרט ü ניסיון במערכות ותשתיות LINUX מבוססות Red Hat ü ידע במערכות אחסון בכלל, ExaGrid ו
• NetApp בפרט ü שליטה בשפות סקריפט Python, BASH ü ידע בבסיסי נתונים PostgreSQL, MySQL ü היכרות עם תשתיות דוא"ל ו
• DNS ü ידע בתקשורת ואבטחת מידע ü יכולת למידה עצמית והובלת נושאים טכנולוגיים ü תודעת שירות גבוהה ויכולת עבודה עם קהל לקוחות מגוון ü כישורי פתרון בעיות מורכבות בסביבה טכנית מתקדמת ובריבוי משימות. ü יכולת עבודה בצוות, תקשורת בין אישית ויחסי אנוש מצוינים. ü אחריות אישית, סדר ויכולת עבודה בסביבה ארגונית מורכבת. ü נכונות לגמישות תפעולית בהתאם לצרכים ü שליטה בעברית ואנגלית ברמה גבוהה היקף המשרה 100% הערותדרישות המשרה
לא צויין
משרה מס' 390154
-
Design Technology Co-Optimization Engineer
פורסם לפני 4 ימיםשם החברה: Googleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Note: By applying to this position you will...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience in Physical Design (RTL
• to
• GDS) or Technology Development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). Experience with industry
• standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. Experience in CMOS device physics, FinFET/nanosheet architectures, and the impact of layout parasitics on PPA. Experience in scripting and automation using Tcl and Python (or Perl) to manage design sweeps and data extraction. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. Experience in Design Technology Co
• Optimization (DTCO), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery). Experience working with major foundry technology files (PDKs) and interpreting Design Rule Manuals (DRM) to guide physical implementation. About the job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting
• edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML
• driven systems. As a Design Technology Co
• Optimization (DTCO) Engineer, you will bridge the gap between process technology and product architecture to define the next generation of data center
• class silicon. You will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures. In this role, you will conduct Place and Route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. You will collaborate with Foundry, IP, and Architecture teams to identify Power, Performance, and Area (PPA) bottlenecks and drive System Technology Co
• Optimization (STCO) initiatives. Your work will involve performing high
• fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify PPA gains. By navigating the trade
• offs between process complexity and design performance, you will ensure Google’s hardware achieves efficiency and power density. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting
• edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world
• leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Responsibilities Execute high
• fidelity Place and Route experiments to evaluate the PPA impact of advanced process features, library architectures, and design rule variations on data center
• class IP. Drive Design Technology Co
• Optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track heights, and scaling boosters (e.g., backside power delivery, buried power rails). Quantify process entitlement through systematic benchmarking of logic and memory macros, identifying bottlenecks in power density and timing closure for next
• generation nodes. Develop automated physical design methodologies and flows to accelerate technology pathfinding and enable rapid what
• if analysis of emerging transistor architectures. Influence System Technology Co
• Optimization by partnering with Hardware Architects and Circuit Designers to translate process
• level innovations into system
• level performance gains. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.דרישות המשרה
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience in Physical Design (RTL
• to
• GDS) or Technology Development, focusing on advanced nodes (e.g., 7nm, 5nm, or below). Experience with industry
• standard Place and Route (P&R) tools and Static Timing Analysis (STA) tools. Experience in C
משרה מס' 390149
-
SoC Power Engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ In this role you will be responsible to mod...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
In this role you will be responsible to model, analysis and estimate power consumption of daily use cases on our next generation SoCs. Drive new ideas into micro
• architecture, design and circuits to reduce SoC power across the dynamic range. Drive budgeting, measurement and analysis of overall SoC power for many use cases of interest. You Will work extensively with many teams across every stage of the project from Architectural definition through Design implementation and SW management to focus on power optimization. To be successful in this role, you must have keen interest and motivativation to deliver best experience to our users, and wide perspective in order to work simultaneously on multiple disciplines. This role is required working closely with many cross
• functional teams and good understanding of hardware and software interaction at system level. Description In this highly visible role, you will be responsible for SOC power simulation and power modeling, SOC use case power analysis, and drive the future SOC power optimization. Preferred Qualifications M.Sc. in Electrical Engineering Silicon power measurement experience Familiarity with multimedia data processing Coding in Python Familiarity with Verilog and System Verilog Familiar with Gen AI Minimum Qualifications BS.c in EE / MS.c in EE or Computer Science/ Electrical Engineering required.","internalDetails":null,"eeoContent":nullדרישות המשרה
M.Sc. in Electrical Engineering Silicon power measurement experience Familiarity with multimedia data processing Coding in Python Familiarity with Verilog and System Verilog Familiar with Gen AI Minimum Qualifications BS.c in EE / MS.c in EE or Computer Science/ Electrical Engineering required.","internalDetails":null,"eeoContent":null
משרה מס' 390143
-
Full Stack Engineer – GenAI Productivity Applications
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ Apple Israel is looking for an experienced ...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
Apple Israel is looking for an experienced full stack engineer to build internal systems and macOS native applications that leverage generative AI for productivity. Description You will join a growing team of multidisciplinary ML and software engineers working on cutting
• edge GenAI applications. In this position, you will collaborate with innovative teams across Apple, designing and developing both backend systems and native UI experiences that bring AI capabilities to users. Are you a big
• picture thinker who loves challenges? Do you have a passion for new technologies and creating code to the highest standards? Your work within this team will continue to uphold and advance the excellence people expect from Apple. Preferred Qualifications Experience with SwiftUI / Swift / TypeScript
• Advantage Minimum Qualifications 3+ years of experience as a full stack developer Strong object
• oriented programming and system design skills Excellent communication, interpersonal, and organizational skills Proven ability to meet deadlines and drive results under tight timeframes Experience with LLMs, Generative AI, or ML integrations","internalDetails":null,"eeoContent":nullדרישות המשרה
Experience with SwiftUI / Swift / TypeScript
• Advantage Minimum Qualifications 3+ years of experience as a full stack developer Strong object
• oriented programming and system design skills Excellent communication, interpersonal, and organizational skills Proven ability to meet deadlines and drive results under tight timeframes Experience with LLMs, Generative AI, or ML integrations","internalDet
משרה מס' 390134
-
CPU performance analysis engineer
פורסם לפני 4 ימיםשם החברה: Appleמיקום: IL (ישראל ארצי) סוג המשרה: משרה מלאה
סקירה כללית
^^משרה זו נלקחה מ INDEED^^ In this role, you will be driving CPU archi...
לצפיה בפרטי המשרהצמצםסקירה כללית
^^משרה זו נלקחה מ INDEED^^
In this role, you will be driving CPU architecture exploration by analyzing performance metrics (latency, power, code density) across benchmarks and CPU families. Investigate optimization opportunities through customizing ISAs and microarchitecture features to improve power and performance. You will develop simulation analysis tools and toolchain infrastructure for CPU/SOC architectures. You will collaborate closely with Apple's algorithm and software teams to build efficient CPUs, enhancing performance for diverse use cases. Description You will be responsible to create analysis tools to assist in architecture exploration. You will define and simulate CPU features and develop supporting tool chains including simulators, analysis tools, compiler, etc.. You will collaborate with SW and algorithm teams as well as implementation teams to define and build efficient CPUs that integrate seamlessly into various subsystems.","responsibilities":"Work with SW and algorithm teams for optimization and customization of ISAs, CPU architecture, and micro architecture features Create and analyze benchmarks for CPU and SOC subsystem architectures Develop architectural and performance simulators Define and develop toolchain infrastructure Preferred Qualifications LLVM and Tablegen knowledge is an advantage Minimum Qualifications Prior knowledge or familiarity with ARM or RISC
• V instruction sets Strong understanding of embedded CPU architecture and micro architecture Background and experience with software build processes including binary tools and toolchains Knowledge in C++ and Python Experience with software optimization including SIMD and vector processing Experience with using CPU simulators","internalDetails":null,"eeoContent":nullדרישות המשרה
":"Work with SW and algorithm teams for optimization and customization of ISAs, CPU architecture, and micro architecture features Create and analyze benchmarks for CPU and SOC subsystem architectures Develop architectural and performance simulators Define and develop toolchain infrastructure Preferred Qualifications LLVM and Tablegen knowledge is an advantage Minimum Qualifications Prior knowledge
משרה מס' 390131